From: Antony Pavlov <antonynpavlov@gmail.com> To: barebox@lists.infradead.org Cc: Ahmad Fatoum <a.fatoum@pengutronix.de> Subject: [PATCH v3 02/10] RISC-V: make it possible to run nmon from PBL C code Date: Tue, 25 May 2021 10:19:44 +0300 [thread overview] Message-ID: <20210525071952.18045-3-antonynpavlov@gmail.com> (raw) In-Reply-To: <20210525071952.18045-1-antonynpavlov@gmail.com> After migrating to PBL we can't use nmon assembler macro in C code anymore. Some changes are introduced to invoke nmon from PBL C code: * use 'lla' macro instruction instead of 'la'; * don't touch the 'ra' register, use 'a2' instead; * add wrapper C function for nmon. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- arch/riscv/boot/Makefile | 1 + arch/riscv/boot/nmon_entry.S | 13 ++++++++ arch/riscv/include/asm/riscv_nmon.h | 49 +++++++++++++++++++---------- 3 files changed, 46 insertions(+), 17 deletions(-) diff --git a/arch/riscv/boot/Makefile b/arch/riscv/boot/Makefile index 968a826d16..80f63a4a0a 100644 --- a/arch/riscv/boot/Makefile +++ b/arch/riscv/boot/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 obj-y += start.o pbl-y += entry.o uncompress.o +pbl-y += nmon_entry.o pbl-$(CONFIG_BOARD_GENERIC_DT) += board-dt-2nd.o diff --git a/arch/riscv/boot/nmon_entry.S b/arch/riscv/boot/nmon_entry.S new file mode 100644 index 0000000000..ae017d2a1c --- /dev/null +++ b/arch/riscv/boot/nmon_entry.S @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#include <linux/linkage.h> +#include <asm/sections.h> + +#include "asm/debug_ll.h" +#include "asm/riscv_nmon.h" + +.section .text_bare_init + +ENTRY(__barebox_nmon_entry) + riscv_nmon + ret +ENDPROC(__barebox_nmon_entry) diff --git a/arch/riscv/include/asm/riscv_nmon.h b/arch/riscv/include/asm/riscv_nmon.h index caf213cdd8..8a44e216d7 100644 --- a/arch/riscv/include/asm/riscv_nmon.h +++ b/arch/riscv/include/asm/riscv_nmon.h @@ -16,13 +16,26 @@ #ifndef __ASM_RISCV_NMON_H #define __ASM_RISCV_NMON_H +#include <linux/kconfig.h> + #define CODE_ESC 0x1b +#ifndef __ASSEMBLY__ + +extern void __barebox_nmon_entry(void); + +static inline void barebox_nmon_entry(void) +{ + if (IS_ENABLED(CONFIG_NMON)) + __barebox_nmon_entry(); +} + +#else + .macro nmon_outs msg - la a1, \msg - - jal _nmon_outs + lla a1, \msg + jal a2, _nmon_outs .endm @@ -73,7 +86,7 @@ nmon_main: li a0, 'q' bne s0, a0, 3f - jal _nmon_outc_a0 + jal a2, _nmon_outc_a0 j nmon_exit @@ -90,12 +103,12 @@ nmon_main: j nmon_main_help nmon_cmd_d: - jal _nmon_outc_a0 + jal a2, _nmon_outc_a0 li a0, ' ' - jal _nmon_outc_a0 + jal a2, _nmon_outc_a0 - jal _nmon_gethexw + jal a2, _nmon_gethexw nmon_outs msg_nl @@ -105,28 +118,28 @@ nmon_cmd_d: j nmon_main nmon_cmd_w: - jal _nmon_outc_a0 + jal a2, _nmon_outc_a0 li a0, ' ' - jal _nmon_outc_a0 + jal a2, _nmon_outc_a0 - jal _nmon_gethexw + jal a2, _nmon_gethexw move s2, s0 li a0, ' ' - jal _nmon_outc_a0 - jal _nmon_gethexw + jal a2, _nmon_outc_a0 + jal a2, _nmon_gethexw sw s0, 0(s2) j nmon_main nmon_cmd_g: - jal _nmon_outc_a0 + jal a2, _nmon_outc_a0 li a0, ' ' - jal _nmon_outc_a0 + jal a2, _nmon_outc_a0 - jal _nmon_gethexw + jal a2, _nmon_gethexw move s2, s0 nmon_outs msg_nl @@ -136,7 +149,7 @@ nmon_cmd_g: _nmon_outc_a0: debug_ll_outc_a0 - jr ra + jr a2 _nmon_outs: @@ -202,7 +215,7 @@ _get_hex_digit: move s0, t2 _nmon_jr_ra_exit: - jr ra + jr a2 msg_prompt: .asciz "\r\nnmon> " @@ -231,4 +244,6 @@ nmon_exit: .endm +#endif /* __ASSEMBLY__ */ + #endif /* __ASM_RISCV_NMON_H */ -- 2.31.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2021-05-25 7:21 UTC|newest] Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-25 7:19 [PATCH v3 00/10] RISC-V: add LiteX SoC support; resurrect nmon Antony Pavlov 2021-05-25 7:19 ` [PATCH v3 01/10] clocksource: timer-riscv: select CSR from device tree Antony Pavlov 2021-05-25 12:54 ` Ahmad Fatoum 2021-05-25 7:19 ` Antony Pavlov [this message] 2021-05-25 7:19 ` [PATCH v3 03/10] RISC-V: boards: erizo: make it possible to use nmon Antony Pavlov 2021-05-25 7:19 ` [PATCH v3 04/10] serial: add litex UART driver Antony Pavlov 2021-05-25 7:19 ` [PATCH v3 05/10] litex serial: add setbrg callback Antony Pavlov 2021-05-25 7:36 ` Antony Pavlov 2021-05-25 12:48 ` Ahmad Fatoum 2021-05-25 7:19 ` [PATCH v3 06/10] gpio: add driver for 74xx-ICs with MMIO access Antony Pavlov 2021-05-25 7:19 ` [PATCH v3 07/10] spi: add litex spiflash driver Antony Pavlov 2021-05-25 7:19 ` [PATCH v3 08/10] net: add LiteEth driver Antony Pavlov 2021-05-25 7:19 ` [PATCH v3 09/10] RISC-V: add LiteX SoC and linux-on-litex-vexriscv support Antony Pavlov 2021-05-25 7:47 ` Jan Lübbe 2021-05-25 8:52 ` Antony Pavlov 2021-05-25 7:19 ` [PATCH v3 10/10] RISC-V: add litex_linux_defconfig Antony Pavlov 2021-08-11 8:52 ` [PATCH v3 00/10] RISC-V: add LiteX SoC support; resurrect nmon Ahmad Fatoum 2021-08-17 10:16 ` Antony Pavlov 2021-08-17 10:20 ` Ahmad Fatoum
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210525071952.18045-3-antonynpavlov@gmail.com \ --to=antonynpavlov@gmail.com \ --cc=a.fatoum@pengutronix.de \ --cc=barebox@lists.infradead.org \ --subject='Re: [PATCH v3 02/10] RISC-V: make it possible to run nmon from PBL C code' \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox