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From: Sascha Hauer <sha@pengutronix.de>
To: Renaud Barbier <renaud.barbier@abaco.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 2/3] nand: add NXP IFC nand driver
Date: Mon, 9 Aug 2021 21:16:25 +0200
Message-ID: <20210809191625.GB24834@pengutronix.de> (raw)
In-Reply-To: <1627900804-15814-3-git-send-email-renaud.barbier@abaco.com>

Hi Renaud,

On Mon, Aug 02, 2021 at 11:40:03AM +0100, Renaud Barbier wrote:
> Add the NXP IFC nand driver support. This driver
> can be used with the NXP QorIQ cores.

Could you leave a few words here which base you used for the driver? Is
it based on Linux or U-Boot, which version?

> +static void fsl_ifc_ctrl_init(void)
> +{
> +	struct fsl_ifc_ctrl *ctrl;
> +	struct device_node *np;
> +
> +	np = of_find_compatible_node(NULL, NULL, "fsl,ifc");
> +	if (!np)
> +		return;

Looks like this function can fail, it should return an error.

> +		while (!is_timeout(time_start, IFC_TIMEOUT_MS * MSECOND)) {
> +			ifc_ctrl->nand_stat =
> +				ifc_in32(ctrl->rregs + FSL_IFC_NAND_EVTER_STAT);
> +
> +			if (!(ifc_ctrl->nand_stat & IFC_NAND_SRAM_INIT_EN))
> +				return 0;
> +		}
> +		pr_err("fsl-ifc: Failed to Initialise SRAM\n");
> +		return 1;

It would be better to return an error code here and propagate that.

Sascha

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  reply	other threads:[~2021-08-09 19:18 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02 10:40 [PATCH v2 0/3] " Renaud Barbier
2021-08-02 10:40 ` [PATCH 1/3] ARM: atomic.h: add 64-bit counter support Renaud Barbier
2021-08-09 11:01   ` Ahmad Fatoum
2021-08-02 10:40 ` [PATCH 2/3] nand: add NXP IFC nand driver Renaud Barbier
2021-08-09 19:16   ` Sascha Hauer [this message]
2021-08-10  8:33     ` Barbier, Renaud
2021-08-02 10:40 ` [PATCH 3/3] ls1046ardb: enable IFC NAND Renaud Barbier
2021-08-09 10:49   ` Ahmad Fatoum
2021-08-10 10:33     ` Barbier, Renaud
2021-08-13  8:16 [PATCH v3 0/3] NXP IFC nand driver Renaud Barbier
2021-08-13  8:16 ` [PATCH 2/3] nand: add " Renaud Barbier

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