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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:7c80:54:e::133 (failed) X-Broken-Reverse-DNS: no host name for IP address 2607:7c80:54:e::133 X-SA-Exim-Connect-IP: 2607:7c80:54:e::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-3.0 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,PTX_BROKEN_RDNS, RCVD_IN_DNSWL_MED,RDNS_NONE,SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Subject: [PATCH 3/3] arm: zynqmp: add boot source support X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) The ZynqMP reports the mode pins sampled at POR via the register ZYNQMP_CRL_APB_BOOT_MODE_USER. This commit adds a function that reads the register and populates the boot source. Signed-off-by: Michael Riesch --- arch/arm/mach-zynqmp/zynqmp.c | 43 +++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/mach-zynqmp/zynqmp.c b/arch/arm/mach-zynqmp/zynqmp.c index 5871c145b..262bc0dd4 100644 --- a/arch/arm/mach-zynqmp/zynqmp.c +++ b/arch/arm/mach-zynqmp/zynqmp.c @@ -6,9 +6,11 @@ #include #include #include +#include #include #define ZYNQMP_CRL_APB_BASE 0xff5e0000 +#define ZYNQMP_CRL_APB_BOOT_MODE_USER (ZYNQMP_CRL_APB_BASE + 0x200) #define ZYNQMP_CRL_APB_RESET_REASON (ZYNQMP_CRL_APB_BASE + 0x220) /* External POR: The PS_POR_B reset signal pin was asserted. */ @@ -26,6 +28,46 @@ /* Software debugger reset: Write to BLOCKONLY_RST [debug_only]. */ #define ZYNQMP_CRL_APB_RESET_REASON_DEBUG_SYS BIT(6) +struct zynqmp_bootsource { + enum bootsource src; + int instance; +}; + +/* cf. Table 11-1 "Boot Modes" in UG1085 Zynq UltraScale+ Device TRM */ +static struct zynqmp_bootsource boot_modes[] = { + { .src = BOOTSOURCE_JTAG, .instance = 0 }, + { .src = BOOTSOURCE_SPI, .instance = 0 }, + { .src = BOOTSOURCE_SPI, .instance = 0 }, + { .src = BOOTSOURCE_MMC, .instance = 0 }, + { .src = BOOTSOURCE_SPI_NAND, .instance = 0 }, + { .src = BOOTSOURCE_MMC, .instance = 1 }, + { .src = BOOTSOURCE_MMC, .instance = 0 }, + { .src = BOOTSOURCE_USB, .instance = 0 }, + { .src = BOOTSOURCE_JTAG, .instance = 0 }, + { .src = BOOTSOURCE_JTAG, .instance = 0 }, + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 }, + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 }, + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 }, + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 }, + { .src = BOOTSOURCE_MMC, .instance = 1 }, +}; + +static enum bootsource zynqmp_bootsource(void) +{ + u32 v; + + v = readl(ZYNQMP_CRL_APB_BOOT_MODE_USER); + v &= 0x0F; + + if (v >= ARRAY_SIZE(boot_modes)) + return BOOTSOURCE_UNKNOWN; + + bootsource_set(boot_modes[v].src); + bootsource_set_instance(boot_modes[v].instance); + + return boot_modes[v].src; +} + struct zynqmp_reset_reason { u32 mask; enum reset_src_type type; @@ -65,6 +107,7 @@ static enum reset_src_type zynqmp_get_reset_src(void) static int zynqmp_init(void) { + zynqmp_bootsource(); reset_source_set(zynqmp_get_reset_src()); return 0; -- 2.17.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox