From: Michael Tretter <m.tretter@pengutronix.de>
To: Michael Riesch <michael.riesch@wolfvision.net>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 3/3] arm: zynqmp: add boot source support
Date: Fri, 10 Sep 2021 15:59:33 +0200 [thread overview]
Message-ID: <20210910135933.GA24395@pengutronix.de> (raw)
In-Reply-To: <20210910134323.26136-4-michael.riesch@wolfvision.net>
On Fri, 10 Sep 2021 15:43:23 +0200, Michael Riesch wrote:
> The ZynqMP reports the mode pins sampled at POR via the register
> ZYNQMP_CRL_APB_BOOT_MODE_USER. This commit adds a function that reads
> the register and populates the boot source.
>
> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
> ---
> arch/arm/mach-zynqmp/zynqmp.c | 43 +++++++++++++++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm/mach-zynqmp/zynqmp.c b/arch/arm/mach-zynqmp/zynqmp.c
> index 5871c145b..262bc0dd4 100644
> --- a/arch/arm/mach-zynqmp/zynqmp.c
> +++ b/arch/arm/mach-zynqmp/zynqmp.c
> @@ -6,9 +6,11 @@
> #include <common.h>
> #include <init.h>
> #include <linux/types.h>
> +#include <bootsource.h>
> #include <reset_source.h>
>
> #define ZYNQMP_CRL_APB_BASE 0xff5e0000
> +#define ZYNQMP_CRL_APB_BOOT_MODE_USER (ZYNQMP_CRL_APB_BASE + 0x200)
> #define ZYNQMP_CRL_APB_RESET_REASON (ZYNQMP_CRL_APB_BASE + 0x220)
>
> /* External POR: The PS_POR_B reset signal pin was asserted. */
> @@ -26,6 +28,46 @@
> /* Software debugger reset: Write to BLOCKONLY_RST [debug_only]. */
> #define ZYNQMP_CRL_APB_RESET_REASON_DEBUG_SYS BIT(6)
>
> +struct zynqmp_bootsource {
> + enum bootsource src;
> + int instance;
> +};
> +
> +/* cf. Table 11-1 "Boot Modes" in UG1085 Zynq UltraScale+ Device TRM */
> +static struct zynqmp_bootsource boot_modes[] = {
> + { .src = BOOTSOURCE_JTAG, .instance = 0 },
> + { .src = BOOTSOURCE_SPI, .instance = 0 },
> + { .src = BOOTSOURCE_SPI, .instance = 0 },
> + { .src = BOOTSOURCE_MMC, .instance = 0 },
> + { .src = BOOTSOURCE_SPI_NAND, .instance = 0 },
> + { .src = BOOTSOURCE_MMC, .instance = 1 },
> + { .src = BOOTSOURCE_MMC, .instance = 0 },
> + { .src = BOOTSOURCE_USB, .instance = 0 },
> + { .src = BOOTSOURCE_JTAG, .instance = 0 },
> + { .src = BOOTSOURCE_JTAG, .instance = 0 },
> + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 },
> + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 },
> + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 },
> + { .src = BOOTSOURCE_UNKNOWN, .instance = 0 },
> + { .src = BOOTSOURCE_MMC, .instance = 1 },
> +};
Thanks for the patch.
Please make the mapping of the Boot Mode value to the BOOTSOURCE explicit
instead of hiding in as the index into this array.
> +
> +static enum bootsource zynqmp_bootsource(void)
> +{
> + u32 v;
> +
> + v = readl(ZYNQMP_CRL_APB_BOOT_MODE_USER);
> + v &= 0x0F;
> +
> + if (v >= ARRAY_SIZE(boot_modes))
> + return BOOTSOURCE_UNKNOWN;
> +
> + bootsource_set(boot_modes[v].src);
> + bootsource_set_instance(boot_modes[v].instance);
Don't set the bootsource as a side effect of this function. This function
should only lookup of the boot mode and zynqmp_init should actually set it.
Michael
> +
> + return boot_modes[v].src;
> +}
> +
> struct zynqmp_reset_reason {
> u32 mask;
> enum reset_src_type type;
> @@ -65,6 +107,7 @@ static enum reset_src_type zynqmp_get_reset_src(void)
>
> static int zynqmp_init(void)
> {
> + zynqmp_bootsource();
> reset_source_set(zynqmp_get_reset_src());
>
> return 0;
> --
> 2.17.1
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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next prev parent reply other threads:[~2021-09-10 14:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-10 13:43 [PATCH 0/3] arm: zynqmp: add support for zcu106 and boot sources Michael Riesch
2021-09-10 13:43 ` [PATCH 1/3] arm: zynqmp: add support for xilinx zcu106 board Michael Riesch
2021-09-10 13:43 ` [PATCH 2/3] Documentation: boards: zynqmp: fix broken links Michael Riesch
2021-09-10 13:43 ` [PATCH 3/3] arm: zynqmp: add boot source support Michael Riesch
2021-09-10 13:59 ` Michael Tretter [this message]
2021-09-13 10:53 ` Michael Riesch
2021-09-13 11:09 ` Ahmad Fatoum
2021-09-13 12:03 ` Michael Riesch
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