* [PATCH v=2] serial: implement riscv SBI console support
@ 2021-09-27 20:05 Marcelo Politzer
2021-10-01 9:27 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Marcelo Politzer @ 2021-09-27 20:05 UTC (permalink / raw)
To: barebox; +Cc: Marcelo Politzer
Implement a console over legacy SBI (version 0.1.0). There is a tiny ringbuffer
to simplify checking for presence and reading characters as separate steps.
---
arch/riscv/cpu/core.c | 12 ++++++++
arch/riscv/lib/sbi.c | 10 +++++++
drivers/serial/Kconfig | 8 +++++
drivers/serial/Makefile | 1 +
drivers/serial/serial_sbi.c | 58 +++++++++++++++++++++++++++++++++++++
5 files changed, 89 insertions(+)
create mode 100644 drivers/serial/serial_sbi.c
diff --git a/arch/riscv/cpu/core.c b/arch/riscv/cpu/core.c
index 80730c05b..1d5902a51 100644
--- a/arch/riscv/cpu/core.c
+++ b/arch/riscv/cpu/core.c
@@ -33,6 +33,7 @@ static int riscv_request_stack(void)
coredevice_initcall(riscv_request_stack);
static struct device_d timer_dev;
+static struct device_d serial_sbi_dev;
static s64 hartid;
@@ -75,6 +76,17 @@ static int riscv_probe(struct device_d *parent)
return ret;
}
+ if (IS_ENABLED(CONFIG_SERIAL_SBI) && !serial_sbi_dev.parent) {
+ serial_sbi_dev.id = DEVICE_ID_SINGLE;
+ serial_sbi_dev.device_node = 0;
+ serial_sbi_dev.parent = parent;
+ dev_set_name(&serial_sbi_dev, "riscv-serial-sbi");
+
+ ret = platform_device_register(&serial_sbi_dev);
+ if (ret)
+ return ret;
+ }
+
hartid = riscv_hartid();
if (hartid >= 0)
globalvar_add_simple_uint64("hartid", &hartid, "%llu");
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 45a04fb82..a57c834b4 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -64,3 +64,13 @@ static int sbi_init(void)
}
core_initcall(sbi_init);
+
+void sbi_console_putchar(int ch)
+{
+ sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);
+}
+
+int sbi_console_getchar(void)
+{
+ return sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0).error;
+}
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b9750d177..5e30ea388 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -173,4 +173,12 @@ config SERIAL_SIFIVE
contains a SiFive UART IP block. This type of UART is present on
SiFive FU540 SoCs, among others.
+config SERIAL_SBI
+ tristate "RISCV Serial support over SBI's HTIF"
+ depends on OFDEVICE
+ depends on RISCV_SBI
+ help
+ Select this option if you are building barebox for a RISCV platform
+ that implements a serial over SBI.
+
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5120b1737..b1de436ed 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
obj-$(CONFIG_DRIVER_SERIAL_LPUART) += serial_lpuart.o
obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o
obj-$(CONFIG_SERIAL_SIFIVE) += serial_sifive.o
+obj-$(CONFIG_SERIAL_SBI) += serial_sbi.o
diff --git a/drivers/serial/serial_sbi.c b/drivers/serial/serial_sbi.c
new file mode 100644
index 000000000..2ea28fea5
--- /dev/null
+++ b/drivers/serial/serial_sbi.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Marcelo Politzer <marcelo.politzer@cartesi.io>
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <malloc.h>
+#include <asm/sbi.h>
+
+struct sbi_serial_priv {
+ struct console_device cdev;
+ uint8_t b[2], head, tail;
+};
+
+static int sbi_serial_getc(struct console_device *cdev)
+{
+ struct sbi_serial_priv *priv = cdev->dev->priv;
+ if (priv->head == priv->tail)
+ return -1;
+ return priv->b[priv->head++ & 0x1];
+}
+
+static void sbi_serial_putc(struct console_device *cdev, const char ch)
+{
+ sbi_console_putchar(ch);
+}
+
+static int sbi_serial_tstc(struct console_device *cdev)
+{
+ struct sbi_serial_priv *priv = cdev->dev->priv;
+ int c = sbi_console_getchar();
+
+ if (c != -1)
+ priv->b[priv->tail++ & 0x1] = c;
+ return priv->head != priv->tail;
+}
+
+static int sbi_serial_probe(struct device_d *dev)
+{
+ struct sbi_serial_priv *priv;
+
+ priv = dev->priv = xzalloc(sizeof(*priv));
+ priv->cdev.dev = dev;
+ priv->cdev.putc = sbi_serial_putc;
+ priv->cdev.getc = sbi_serial_getc;
+ priv->cdev.tstc = sbi_serial_tstc;
+ priv->cdev.flush = 0;
+ priv->cdev.setbrg = 0;
+
+ return console_register(&priv->cdev);
+}
+
+static struct driver_d serial_sbi_driver = {
+ .name = "riscv-serial-sbi",
+ .probe = sbi_serial_probe,
+};
+postcore_platform_driver(serial_sbi_driver);
--
2.32.0
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v=2] serial: implement riscv SBI console support
2021-09-27 20:05 [PATCH v=2] serial: implement riscv SBI console support Marcelo Politzer
@ 2021-10-01 9:27 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2021-10-01 9:27 UTC (permalink / raw)
To: Marcelo Politzer; +Cc: barebox
On Mon, Sep 27, 2021 at 05:05:21PM -0300, Marcelo Politzer wrote:
> Implement a console over legacy SBI (version 0.1.0). There is a tiny ringbuffer
> to simplify checking for presence and reading characters as separate steps.
> ---
> arch/riscv/cpu/core.c | 12 ++++++++
> arch/riscv/lib/sbi.c | 10 +++++++
> drivers/serial/Kconfig | 8 +++++
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_sbi.c | 58 +++++++++++++++++++++++++++++++++++++
> 5 files changed, 89 insertions(+)
> create mode 100644 drivers/serial/serial_sbi.c
Applied, thanks
Sascha
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