Re: [PATCH 1/2] phy: freescale: imx8mq-usb: add support for i.MX8MP PHY

[Sascha Hauer <sha@pengutronix.de>]

On Tue, Apr 12, 2022 at 09:52:40PM +0200, Lucas Stach wrote:
> This is a port of the Linux kernel commit 4708ee37826e
> by Li Jun <jun.li@nxp.com>. The USB3 PHY in the i.MX8MP is very
> close to the one in the i.MX8MQ and just needs a different setup
> routine.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  drivers/phy/freescale/phy-fsl-imx8mq-usb.c | 87 ++++++++++++++++++----
>  1 file changed, 74 insertions(+), 13 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> index d3f9c1ba6ecf..fc5fb006b56c 100644
> --- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> +++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
> @@ -2,20 +2,24 @@
>  /* Copyright (c) 2017 NXP. */
>  
>  #include <common.h>
> +#include <driver.h>
> +#include <errno.h>
>  #include <init.h>
>  #include <io.h>
> -#include <of.h>
> -#include <errno.h>
> -#include <driver.h>
> -#include <malloc.h>
> -#include <usb/phy.h>
> -#include <linux/phy/phy.h>
> +#include <linux/bitfield.h>
>  #include <linux/clk.h>
>  #include <linux/err.h>
> +#include <linux/phy/phy.h>
> +#include <malloc.h>
> +#include <of_device.h>
> +#include <of.h>
> +#include <usb/phy.h>
>  
>  
>  #define PHY_CTRL0			0x0
>  #define PHY_CTRL0_REF_SSP_EN		BIT(2)
> +#define PHY_CTRL0_FSEL_MASK		GENMASK(10, 5)
> +#define PHY_CTRL0_FSEL_24M		0x2a
>  
>  #define PHY_CTRL1			0x4
>  #define PHY_CTRL1_RESET			BIT(0)
> @@ -26,6 +30,11 @@
>  
>  #define PHY_CTRL2			0x8
>  #define PHY_CTRL2_TXENABLEN0		BIT(8)
> +#define PHY_CTRL2_OTG_DISABLE		BIT(9)
> +
> +#define PHY_CTRL6			0x18
> +#define PHY_CTRL6_ALT_CLK_EN		BIT(1)
> +#define PHY_CTRL6_ALT_CLK_SEL		BIT(0)
>  
>  struct imx8mq_usb_phy {
>  	struct phy *phy;
> @@ -59,6 +68,44 @@ static int imx8mq_usb_phy_init(struct phy *phy)
>  	return 0;
>  }
>  
> +static int imx8mp_usb_phy_init(struct phy *phy)
> +{
> +	struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
> +	u32 value;
> +
> +	/* USB3.0 PHY signal fsel for 24M ref */
> +	value = readl(imx_phy->base + PHY_CTRL0);
> +	value &= ~PHY_CTRL0_FSEL_MASK;
> +	value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
> +	writel(value, imx_phy->base + PHY_CTRL0);
> +
> +	/* Disable alt_clk_en and use internal MPLL clocks */
> +	value = readl(imx_phy->base + PHY_CTRL6);
> +	value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
> +	writel(value, imx_phy->base + PHY_CTRL6);
> +
> +	value = readl(imx_phy->base + PHY_CTRL1);
> +	value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
> +	value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
> +	writel(value, imx_phy->base + PHY_CTRL1);
> +
> +	value = readl(imx_phy->base + PHY_CTRL0);
> +	value |= PHY_CTRL0_REF_SSP_EN;
> +	writel(value, imx_phy->base + PHY_CTRL0);
> +
> +	value = readl(imx_phy->base + PHY_CTRL2);
> +	value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
> +	writel(value, imx_phy->base + PHY_CTRL2);
> +
> +	udelay(10);
> +
> +	value = readl(imx_phy->base + PHY_CTRL1);
> +	value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
> +	writel(value, imx_phy->base + PHY_CTRL1);
> +
> +	return 0;
> +}
> +
>  static int imx8mq_phy_power_on(struct phy *phy)
>  {
>  	struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
> @@ -75,12 +122,26 @@ static int imx8mq_phy_power_off(struct phy *phy)
>  	return 0;
>  }
>  
> -static struct phy_ops imx8mq_usb_phy_ops = {
> +static const struct phy_ops imx8mq_usb_phy_ops = {
>  	.init		= imx8mq_usb_phy_init,
>  	.power_on	= imx8mq_phy_power_on,
>  	.power_off	= imx8mq_phy_power_off,
>  };
>  
> +static const struct phy_ops imx8mp_usb_phy_ops = {
> +	.init		= imx8mp_usb_phy_init,
> +	.power_on	= imx8mq_phy_power_on,
> +	.power_off	= imx8mq_phy_power_off,
> +};
> +
> +static const struct of_device_id imx8mq_usb_phy_of_match[] = {
> +	{.compatible = "fsl,imx8mq-usb-phy",
> +	 .data = &imx8mq_usb_phy_ops,},
> +	{.compatible = "fsl,imx8mp-usb-phy",
> +	 .data = &imx8mp_usb_phy_ops,},
> +	{ }
> +};
> +
>  static struct phy *imx8mq_usb_phy_xlate(struct device_d *dev,
>  					struct of_phandle_args *args)
>  {
> @@ -93,6 +154,7 @@ static int imx8mq_usb_phy_probe(struct device_d *dev)
>  {
>  	struct phy_provider *phy_provider;
>  	struct imx8mq_usb_phy *imx_phy;
> +	const struct phy_ops *phy_ops;
>  
>  	imx_phy = xzalloc(sizeof(*imx_phy));
>  
> @@ -106,7 +168,11 @@ static int imx8mq_usb_phy_probe(struct device_d *dev)
>  	if (IS_ERR(imx_phy->base))
>  		return PTR_ERR(imx_phy->base);
>  
> -	imx_phy->phy = phy_create(dev, NULL, &imx8mq_usb_phy_ops);
> +	phy_ops = of_device_get_match_data(dev);
> +	if (!phy_ops)
> +		return -EINVAL;
> +
> +	imx_phy->phy = phy_create(dev, NULL, phy_ops);
>  	if (IS_ERR(imx_phy->phy))
>  		return PTR_ERR(imx_phy->phy);
>  
> @@ -117,11 +183,6 @@ static int imx8mq_usb_phy_probe(struct device_d *dev)
>  	return PTR_ERR_OR_ZERO(phy_provider);
>  }
>  
> -static const struct of_device_id imx8mq_usb_phy_of_match[] = {
> -	{.compatible = "fsl,imx8mq-usb-phy",},
> -	{ },
> -};
> -
>  static struct driver_d imx8mq_usb_phy_driver = {
>  	.name	= "imx8mq-usb-phy",
>  	.probe	= imx8mq_usb_phy_probe,
> -- 
> 2.34.1
> 
> 
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