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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-3.0 required=4.0 tests=AWL,BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [RFC 5/8] ARM: OMAP: emif: Abstract am35xx_emif4 from any CPU-specific includes X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) Signed-off-by: Alexander Shiyan --- arch/arm/boards/wago-pfc-am35xx/lowlevel.c | 2 +- arch/arm/mach-omap/am35xx_emif4.c | 4 +--- arch/arm/mach-omap/include/mach/emif4.h | 2 +- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm/boards/wago-pfc-am35xx/lowlevel.c b/arch/arm/boards/wago-pfc-am35xx/lowlevel.c index 7da8fd0331..63afd043a0 100644 --- a/arch/arm/boards/wago-pfc-am35xx/lowlevel.c +++ b/arch/arm/boards/wago-pfc-am35xx/lowlevel.c @@ -200,7 +200,7 @@ static noinline void pfc200_board_init(void) /* Dont reconfigure SDRAM while running in SDRAM */ if (!in_sdram) - am35xx_emif4_init(); + am35xx_emif4_init(IOMEM(OMAP3_SDRC_BASE)); barebox_arm_entry(0x80000000, SZ_256M, NULL); } diff --git a/arch/arm/mach-omap/am35xx_emif4.c b/arch/arm/mach-omap/am35xx_emif4.c index bd4fbd21e3..e61cf00c57 100644 --- a/arch/arm/mach-omap/am35xx_emif4.c +++ b/arch/arm/mach-omap/am35xx_emif4.c @@ -12,7 +12,6 @@ #include #include #include -#include /* * AM35xx configuration values @@ -70,9 +69,8 @@ * - Init the emif4 module for DDR access * - Early init routines, called from flash or SRAM. */ -void am35xx_emif4_init(void) +void am35xx_emif4_init(const void __iomem *emif4) { - const void __iomem *emif4 = IOMEM(OMAP3_SDRC_BASE); unsigned int regval; /* Set the DDR PHY parameters in PHY ctrl registers */ diff --git a/arch/arm/mach-omap/include/mach/emif4.h b/arch/arm/mach-omap/include/mach/emif4.h index 23d5c18fcf..10ecfe6c6b 100644 --- a/arch/arm/mach-omap/include/mach/emif4.h +++ b/arch/arm/mach-omap/include/mach/emif4.h @@ -45,6 +45,6 @@ #define EMIF4_DDR_PHY_CTRL_2 0xec #define EMIF4_IODFT_TLGC 0x60 -void am35xx_emif4_init(void); +void am35xx_emif4_init(const void __iomem *emif4); #endif /* endif _EMIF_H_ */ -- 2.32.0 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox