From: Marco Felsch <m.felsch@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 2/2] ARM: i.MX8M: remove fsp_table entry
Date: Wed, 21 Sep 2022 19:20:52 +0200 [thread overview]
Message-ID: <20220921172052.2989506-2-m.felsch@pengutronix.de> (raw)
In-Reply-To: <20220921172052.2989506-1-m.felsch@pengutronix.de>
Barebox now have the support to write the fsp_table entries
automatically based on fsp_msg.drata information. Remove the fsp_table
entry and let the common code do the rest for us.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
arch/arm/boards/mnt-reform/lpddr4-timing.c | 1 -
arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c | 1 -
arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c | 1 -
arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c | 1 -
4 files changed, 4 deletions(-)
diff --git a/arch/arm/boards/mnt-reform/lpddr4-timing.c b/arch/arm/boards/mnt-reform/lpddr4-timing.c
index 0b5853000d..38fa2c50f1 100644
--- a/arch/arm/boards/mnt-reform/lpddr4-timing.c
+++ b/arch/arm/boards/mnt-reform/lpddr4-timing.c
@@ -1008,5 +1008,4 @@ struct dram_timing_info mnt_reform_dram_timing = {
.fsp_msg_num = ARRAY_SIZE(mnt_reform_lpddr4_dram_fsp_msg),
.ddrphy_pie = mnt_reform_lpddr4_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(mnt_reform_lpddr4_phy_pie),
- .fsp_table = { 3200, 667, },
};
diff --git a/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c b/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c
index 131a63156e..df10bdcc9d 100644
--- a/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c
+++ b/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c
@@ -1050,5 +1050,4 @@ struct dram_timing_info imx8mn_evk_ddr4_timing = {
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 2400, 1066, },
};
diff --git a/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c
index 940b21cedb..63851c87d4 100644
--- a/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c
+++ b/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c
@@ -1586,5 +1586,4 @@ struct dram_timing_info imx8mn_evk_lpddr4_timing = {
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3200, 400, 100, },
};
diff --git a/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c
index 3028bc084c..b8c6b78017 100644
--- a/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c
+++ b/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c
@@ -1844,5 +1844,4 @@ struct dram_timing_info imx8mp_evk_dram_timing = {
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 4000, 400, 100, },
};
--
2.30.2
next prev parent reply other threads:[~2022-09-21 17:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-21 17:20 [PATCH 1/2] ddr: imx8m: write fsp_table entry automatically Marco Felsch
2022-09-21 17:20 ` Marco Felsch [this message]
2022-09-22 9:51 ` Sascha Hauer
2022-09-22 9:54 ` Marco Felsch
2022-09-26 6:01 ` Sascha Hauer
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