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From: Sascha Hauer <sha@pengutronix.de>
To: Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH master v2] Kbuild: disable ARM64 pointer authentication
Date: Mon, 24 Oct 2022 11:04:09 +0200	[thread overview]
Message-ID: <20221024090409.GL6702@pengutronix.de> (raw)
In-Reply-To: <20221019135322.2283270-1-a.fatoum@pengutronix.de>

On Wed, Oct 19, 2022 at 03:53:22PM +0200, Ahmad Fatoum wrote:
> The aarch64 cross-compiler built with Yocto's kirkstone release
> configures -mbranch-protection=standard as default.
> 
> The resulting PACIASP/AUTIASP instructions are interpreted as NOPs by
> existing CPUs, but they increase image size and misalign the barebox
> header in ENTRY_FUNCTION(). Also on ARMv8.3+, where they serve a
> purpose, we wouldn't benefit from them as we don't setup any pointer
> authentication keys. Thus disable it.
> 
> The misaligned barebox header caused is_barebox_arm_head to fail,
> breaking all code that verified barebox' header, like i.MX8MM
> imx-usb-loader barebox-side support and barebox_update for
> some ARM64 SoCs without a SoC-specific header.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
> This is a workaround. ENTRY_FUNCTION() should be rewritten for ARM64,
> so we don't expect function prologue to be exactly two bytes long.
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> 
> v1 -> v2:
>   - revised commit message after understanding ramification better.
> ---
>  Makefile | 5 +++++
>  1 file changed, 5 insertions(+)

Applied, thanks

Sascha

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      reply	other threads:[~2022-10-24  9:05 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-19 13:53 Ahmad Fatoum
2022-10-24  9:04 ` Sascha Hauer [this message]

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