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[2.205.236.27]) by smtp.gmail.com with ESMTPSA id g7-20020a056402090700b00463b9d47e1fsm482851edz.71.2022.11.01.03.33.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Nov 2022 03:33:45 -0700 (PDT) From: Vyacheslav Yurkov To: barebox@lists.infradead.org Cc: Vyacheslav Yurkov Date: Tue, 1 Nov 2022 11:33:26 +0100 Message-Id: <20221101103327.985435-1-uvv.mail@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221101_033350_695543_0823302E X-CRM114-Status: UNSURE ( 9.62 ) X-CRM114-Notice: Please train this message. X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=4.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH v2 1/2] ARM: socfpga: Fix SDRAM firewall init X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) From: Vyacheslav Yurkov Incorrect enable bits were used in initialization sequence of SDRAM firewall. This enables the FPGA to access regions of SDRAM, which were previously inaccessible. Signed-off-by: Vyacheslav Yurkov --- arch/arm/mach-socfpga/arria10-sdram.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-socfpga/arria10-sdram.c b/arch/arm/mach-socfpga/arria10-sdram.c index 35c355df71..b7eade0b17 100644 --- a/arch/arm/mach-socfpga/arria10-sdram.c +++ b/arch/arm/mach-socfpga/arria10-sdram.c @@ -486,7 +486,7 @@ static int arria10_sdram_firewall_setup(void) writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_MPUREGION3ADDR); writel(0xffff0000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM0REGION0ADDR); - mpu_en |= ARRIA10_NOC_FW_DDR_MPU_MPUREG1EN; + mpu_en |= ARRIA10_NOC_FW_DDR_MPU_F2SDR0REG0EN; writel(mpu_en, ARRIA10_SDR_FW_MPU_FPGA_EN); writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM0REGION1ADDR); @@ -494,7 +494,7 @@ static int arria10_sdram_firewall_setup(void) writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM0REGION3ADDR); writel(0xffff0000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM1REGION0ADDR); - mpu_en |= ARRIA10_NOC_FW_DDR_MPU_MPUREG2EN; + mpu_en |= ARRIA10_NOC_FW_DDR_MPU_F2SDR1REG0EN; writel(mpu_en, ARRIA10_SDR_FW_MPU_FPGA_EN); writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM1REGION1ADDR); @@ -502,7 +502,7 @@ static int arria10_sdram_firewall_setup(void) writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM1REGION3ADDR); writel(0xffff0000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM2REGION0ADDR); - mpu_en |= ARRIA10_NOC_FW_DDR_MPU_MPUREG3EN; + mpu_en |= ARRIA10_NOC_FW_DDR_MPU_F2SDR2REG0EN; writel(mpu_en, ARRIA10_SDR_FW_MPU_FPGA_EN); writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM2REGION1ADDR); -- 2.25.1