From: Sascha Hauer <sha@pengutronix.de>
To: John Watts <contact@jookia.org>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH v2] ARM: i.MX6: Specify OCRAM base address and size
Date: Mon, 30 Jan 2023 09:08:14 +0100 [thread overview]
Message-ID: <20230130080814.GP13319@pengutronix.de> (raw)
In-Reply-To: <20230126190258.110423-1-contact@jookia.org>
On Fri, Jan 27, 2023 at 06:02:58AM +1100, John Watts wrote:
> The i.MX6 includes some on-chip RAM: 128KiB on most variants, with 256KiB on
> the Dual and Quad variants.
>
> This region is where the first stage of Barebox gets loaded if RAM
> initialization isn't hard coded using DCD information.
>
> Add the base address and size so it can be used to calculate where to put the
> stack at boot.
>
> Signed-off-by: John Watts <contact@jookia.org>
> ---
> Changes v1 -> v2:
> - Fixed wrong size (thanks Marco!)
> ---
> arch/arm/mach-imx/include/mach/imx6-regs.h | 6 ++++++
> 1 file changed, 6 insertions(+)
Applied, thanks
Sascha
>
> diff --git a/arch/arm/mach-imx/include/mach/imx6-regs.h b/arch/arm/mach-imx/include/mach/imx6-regs.h
> index 39e2751533..89a3b267c6 100644
> --- a/arch/arm/mach-imx/include/mach/imx6-regs.h
> +++ b/arch/arm/mach-imx/include/mach/imx6-regs.h
> @@ -3,6 +3,12 @@
> #ifndef __MACH_IMX6_REGS_H
> #define __MACH_IMX6_REGS_H
>
> +#include <linux/sizes.h>
> +
> +/* Set MAX_SIZE to 128K, only the Quad and Dual have 256K */
> +#define MX6_OCRAM_BASE_ADDR 0x00900000
> +#define MX6_OCRAM_MAX_SIZE SZ_128K
> +
> #define MX6_APBH_BASE_ADDR 0x00110000
> #define MX6_GPMI_BASE_ADDR 0x00112000
> #define MX6_BCH_BASE_ADDR 0x00114000
> --
> 2.39.1
>
>
>
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prev parent reply other threads:[~2023-01-30 18:36 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-26 18:36 [PATCH] " John Watts
2023-01-26 18:45 ` Marco Felsch
2023-01-26 19:02 ` [PATCH v2] " John Watts
2023-01-27 8:06 ` Marco Felsch
2023-01-27 8:56 ` John Watts
2023-01-30 8:08 ` Sascha Hauer
2023-01-30 8:08 ` Sascha Hauer [this message]
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