From: Sascha Hauer <sha@pengutronix.de>
To: Renaud Barbier <Renaud.Barbier@ametek.com>
Cc: Barebox List <barebox@lists.infradead.org>
Subject: Re: Subject: [PATCH 2/2] ARM: Layerscape: Add LS1021A IOT board support
Date: Fri, 24 Feb 2023 11:43:40 +0100 [thread overview]
Message-ID: <20230224104340.GI32097@pengutronix.de> (raw)
In-Reply-To: <BL0PR07MB5665F629C595F00D77D51D4FECAB9@BL0PR07MB5665.namprd07.prod.outlook.com>
On Thu, Feb 23, 2023 at 01:58:46PM +0000, Renaud Barbier wrote:
> diff --git a/arch/arm/lib32/pbl.c b/arch/arm/lib32/pbl.c
> new file mode 100644
> index 0000000000..f4be7b57dc
> --- /dev/null
> +++ b/arch/arm/lib32/pbl.c
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +
> +#include <asm/system.h>
> +#include <clock.h>
> +#include <common.h>
> +
> +void udelay(unsigned long us)
> +{
> + unsigned long long ticks, cntfrq = get_cntfrq();
> + unsigned long long start = get_cntpct();
> +
> + ticks = us * cntfrq + 999999;
> + do_div(ticks, 1000000);
> +
> + while ((long)(start + ticks - get_cntpct()) > 0);
> +}
> +
> +void mdelay(unsigned long ms)
> +{
> + udelay(ms * 1000);
> +}
This will be compiled for every arm32 build, but the architected timer
is not generally available, only a small fraction of CPUs actually have
it. I just tested this on a i.MX6 and it just answers with an illegal
instruction abort when get_cntfrq() is called.
We could name this arm_architected_timer_udelay() or similar.
This change should be in a separate patch.
Sascha
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next prev parent reply other threads:[~2023-02-24 10:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-23 13:58 Renaud Barbier
2023-02-24 10:43 ` Sascha Hauer [this message]
2023-02-24 14:09 ` Renaud Barbier
2023-02-24 18:04 ` Sascha Hauer
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