From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 05/10] pinctrl: rockchip: fix bias settings
Date: Tue, 30 May 2023 13:18:27 +0200 [thread overview]
Message-ID: <20230530111832.1916542-6-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20230530111832.1916542-1-s.hauer@pengutronix.de>
The RK_BIAS_PULL_* defines do not always directly map to register
values. In some cases they have to be translated according to the
bank->pull_type array. Add the missing translation.
The original Linux driver passes pinctrl generic defines into
rockchip_set_pull() whereas the barebox driver directly passes
RK_BIAS_* values into rockchip_set_pull(), therefore I thought this
translation is not necessary and skipped it. While bringing up
SD on a RK3588 I ended up with wrong bias settings though, this
is fixed with this commit.
Fixes: 018fcba104 ("pinctrl: Update pinctrl-rockchip from kernel")
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/pinctrl/pinctrl-rockchip.c | 31 ++++++++++++++++++++++++++----
1 file changed, 27 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 57d676fc98..d7ae77d52a 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2101,6 +2101,21 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
return ret;
}
+static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
+ {
+ RK_BIAS_DISABLE,
+ RK_BIAS_PULL_UP,
+ RK_BIAS_PULL_DOWN,
+ RK_BIAS_BUS_HOLD
+ },
+ {
+ RK_BIAS_DISABLE,
+ RK_BIAS_PULL_DOWN,
+ RK_BIAS_DISABLE,
+ RK_BIAS_PULL_UP
+ },
+};
+
static int rockchip_set_pull(struct rockchip_pin_bank *bank,
int pin_num, int pull)
{
@@ -2108,7 +2123,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
struct rockchip_pin_ctrl *ctrl = info->ctrl;
struct device *dev = info->dev;
struct regmap *regmap;
- int reg, ret;
+ int reg, ret, i, pull_type;
u8 bit;
u32 data, rmask;
@@ -2140,19 +2155,27 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
case RK3399:
case RK3568:
case RK3588:
+ pull_type = bank->pull_type[pin_num / 8];
+ ret = -EINVAL;
+ for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]); i++) {
+ if (rockchip_pull_list[pull_type][i] == pull) {
+ ret = i;
+ break;
+ }
+ }
/*
* In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6,
* where that pull up value becomes 3.
*/
if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
- if (pull == RK_BIAS_PULL_UP)
- pull = 3;
+ if (ret == RK_BIAS_PULL_UP)
+ ret = 3;
}
/* enable the write to the equivalent lower bits */
data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
rmask = data | (data >> 16);
- data |= (pull << bit);
+ data |= (ret << bit);
ret = regmap_update_bits(regmap, reg, rmask, data);
break;
--
2.39.2
next prev parent reply other threads:[~2023-05-30 11:20 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-30 11:18 [PATCH 00/10] ARM: Rockchip rk3588: eMMC/SD support Sascha Hauer
2023-05-30 11:18 ` [PATCH 01/10] mci: rockchip-dwcmshc-sdhci: Add rk3588 Sascha Hauer
2023-05-30 11:18 ` [PATCH 02/10] firmware: arm_scmi: fix async check Sascha Hauer
2023-05-30 11:18 ` [PATCH 03/10] clk: rockchip: add missing pll_rk3588_core handling Sascha Hauer
2023-05-30 11:18 ` [PATCH 04/10] clk: clk-divider: fix CLK_DIVIDER_HIWORD_MASK flag Sascha Hauer
2023-05-30 11:18 ` Sascha Hauer [this message]
2023-05-30 11:18 ` [PATCH 06/10] ARM: dts: rk3588s: Set CPU clock to 816MHz Sascha Hauer
2023-05-30 11:18 ` [PATCH 07/10] mci: rockchip-dwcmshc-sdhci: enable DLL only for clock >= 52MHz Sascha Hauer
2023-05-30 11:18 ` [PATCH 08/10] ARM: rockchip_v8_defconfig: Enable SCMI support Sascha Hauer
2023-05-30 11:18 ` [PATCH 09/10] ARM: multi_v8_defconfig: " Sascha Hauer
2023-05-30 11:18 ` [PATCH 10/10] ARM: rockchip rock 5b: drop no longer valid comments Sascha Hauer
2023-05-30 14:16 ` [PATCH 00/10] ARM: Rockchip rk3588: eMMC/SD support Ahmad Fatoum
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