From: Denis Orlov <denorl2009@gmail.com>
To: barebox@lists.infradead.org
Cc: Denis Orlov <denorl2009@gmail.com>,
Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 16/21] MIPS: main_entry: remove exception vector array
Date: Tue, 25 Jul 2023 08:05:17 +0300 [thread overview]
Message-ID: <20230725050618.3451-17-denorl2009@gmail.com> (raw)
In-Reply-To: <20230725050618.3451-1-denorl2009@gmail.com>
This code must have been taken from Linux, where such a mechanism allows
for an efficient exception vector replacement for board-specific code.
We don't really need that. If some extensions for exception vector are
to be required, this may be done inside the generic handler code anyway.
As we are not using this code, it seems reasonable to just remove it.
Also properly calculate the size of the handler that we are copying into
the designated vectors. Originally, we just made a copy of a fixed size,
copying more than actually needed. We could have just hardcoded this
value there, as the code to copy now consists of just two instructions.
However it feels more safe to calculate that in code instead, so that we
don't have to update this value if some code is added there in the
future.
Signed-off-by: Denis Orlov <denorl2009@gmail.com>
---
arch/mips/boot/main_entry.c | 39 ++++++++-----------------------------
arch/mips/lib/genex.S | 29 ++++++++-------------------
2 files changed, 16 insertions(+), 52 deletions(-)
diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
index 237288a337..d0c69f3c82 100644
--- a/arch/mips/boot/main_entry.c
+++ b/arch/mips/boot/main_entry.c
@@ -14,45 +14,22 @@
#include <asm/addrspace.h>
#include <linux/sizes.h>
-extern void handle_reserved(void);
+extern void exception_vec(void);
+extern void exception_vec_end(void);
void main_entry(void *fdt, u32 fdt_size);
-unsigned long exception_handlers[32];
-
-static void set_except_vector(int n, void *addr)
-{
- unsigned long handler = (unsigned long) addr;
-
- exception_handlers[n] = handler;
-}
-
static void trap_init(void)
{
- extern char except_vec3_generic;
- int i;
-
- unsigned long ebase;
-
- ebase = CKSEG1;
-
- /*
- * Copy the generic exception handlers to their final destination.
- * This will be overriden later as suitable for a particular
- * configuration.
- */
- memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
+ const unsigned long vec_size = exception_vec_end - exception_vec;
+ const unsigned long ebase = CKSEG1;
- /*
- * Setup default vectors
- */
- for (i = 0; i <= 31; i++) {
- set_except_vector(i, &handle_reserved);
- }
+ /* copy the generic exception handlers to their final destination */
+ memcpy((void *)(ebase + 0x180), &exception_vec, vec_size);
/* FIXME: handle tlb */
- memcpy((void *)(ebase), &except_vec3_generic, 0x80);
- memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
+ memcpy((void *)(ebase), &exception_vec, vec_size);
+ memcpy((void *)(ebase + 0x80), &exception_vec, vec_size);
/* unset BOOT EXCEPTION VECTOR bit */
write_c0_status(read_c0_status() & ~ST0_BEV);
diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
index b9d18fc394..27dd9de67a 100644
--- a/arch/mips/lib/genex.S
+++ b/arch/mips/lib/genex.S
@@ -2,7 +2,6 @@
#include <asm/asm.h>
#include <asm/regdef.h>
-#include <asm/mipsregs.h>
#include <asm/stackframe.h>
.text
@@ -11,31 +10,19 @@
.set noreorder
.align 5
-/* Exception vector */
-NESTED(handle_reserved, 0, sp)
+NESTED(exception_vec, 0, sp)
+ j handle_reserved
+ nop
+EXPORT(exception_vec_end)
+END(exception_vec)
+
+handle_reserved:
SAVE_ALL
PTR_LA k0, barebox_exc_handler
- jal k0
+ j k0
move a0, sp
- /* will never return here */
- END(handle_reserved)
-
-/* General exception vector */
-NESTED(except_vec3_generic, 0, sp)
- .set noat
- mfc0 k1, CP0_CAUSE
- PTR_LA k0, exception_handlers
- andi k1, k1, 0x7c
- PTR_ADDU k0, k0, k1
- PTR_L k0, (k0)
- nop
- jr k0
- nop
- END(except_vec3_generic)
- .set at
FEXPORT(ret_from_exception)
.set noat
RESTORE_ALL_AND_RET
- nop
.set at
--
2.41.0
next prev parent reply other threads:[~2023-07-25 5:08 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-25 5:05 [PATCH 00/21] MIPS: semi-random code improvements Denis Orlov
2023-07-25 5:05 ` [PATCH 01/21] MIPS: addrspace: rectify ksseg segment naming Denis Orlov
2023-07-25 5:05 ` [PATCH 02/21] MIPS: addrspace: simplify the header Denis Orlov
2023-07-25 5:05 ` [PATCH 03/21] MIPS: main_entry-pbl: remove unused variable Denis Orlov
2023-07-25 5:05 ` [PATCH 04/21] MIPS: barebox.lds: remove extra whitespace Denis Orlov
2023-07-25 5:05 ` [PATCH 05/21] MIPS: reloc: mark relocate_code() as noreturn Denis Orlov
2023-07-25 5:05 ` [PATCH 06/21] MIPS: cpuinfo: use appropriate format specifiers in printf Denis Orlov
2023-07-25 5:05 ` [PATCH 07/21] MIPS: print BadVAddr CP0 register on exception Denis Orlov
2023-07-25 5:05 ` [PATCH 08/21] MIPS: malta: merge GT64120 headers Denis Orlov
2023-07-25 5:05 ` [PATCH 09/21] MIPS: pbl_macros: use .asciiz instead of .ascii + .byte 0 Denis Orlov
2023-07-25 5:05 ` [PATCH 10/21] MIPS: malta: remove duplicated barebox magic code Denis Orlov
2023-07-25 5:05 ` [PATCH 11/21] MIPS: pbl: put mips_barebox_10h into ENTRY_FUNCTION Denis Orlov
2023-07-25 5:05 ` [PATCH 12/21] MIPS: pbl: make sure to disable interrupts/watchpoints on entry Denis Orlov
2023-07-25 5:05 ` [PATCH 13/21] MIPS: pbl: do enable 64-bit addressing in PBL Denis Orlov
2023-07-25 5:05 ` [PATCH 14/21] MIPS: clean up barebox proper entry point Denis Orlov
2023-07-25 5:05 ` [PATCH 15/21] MIPS: main_entry: properly set XTLB handler for 64-bit mode Denis Orlov
2023-07-25 5:05 ` Denis Orlov [this message]
2023-07-25 5:05 ` [PATCH 17/21] MIPS: c-r4k: prettify code in __BUILD_BLAST_CACHE_RANGE Denis Orlov
2023-07-25 5:05 ` [PATCH 18/21] MIPS: c-r4k: generate blast_*cache functions via macros Denis Orlov
2023-07-25 5:05 ` [PATCH 19/21] MIPS: c-r4k: do flush secondary cache Denis Orlov
2023-07-25 5:05 ` [PATCH 20/21] MIPS: c-r4k: remove extra function declaration Denis Orlov
2023-07-25 5:05 ` [PATCH 21/21] MIPS: reloc: use IS_ALIGNED macro to check for an alignment Denis Orlov
2023-07-27 5:09 ` [PATCH 00/21] MIPS: semi-random code improvements Sascha Hauer
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