From: Denis Orlov <denorl2009@gmail.com>
To: barebox@lists.infradead.org
Cc: Denis Orlov <denorl2009@gmail.com>,
Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 08/21] MIPS: malta: merge GT64120 headers
Date: Tue, 25 Jul 2023 08:05:09 +0300 [thread overview]
Message-ID: <20230725050618.3451-9-denorl2009@gmail.com> (raw)
In-Reply-To: <20230725050618.3451-1-denorl2009@gmail.com>
The various definitions related to GT64120 system controller were split
between two headers: 'asm/gt64120.h' and 'mach/mach-gt64120.h'. It seems
that they were taken from Linux in this form. No reason to keep it like
that though, so unify them into 'mach/gt64120.h'.
Signed-off-by: Denis Orlov <denorl2009@gmail.com>
---
arch/mips/boards/qemu-malta/lowlevel.S | 5 ++---
.../asm => mach-malta/include/mach}/gt64120.h | 13 ++++++++-----
.../mips/mach-malta/include/mach/mach-gt64120.h | 17 -----------------
arch/mips/mach-malta/pci.c | 4 +---
4 files changed, 11 insertions(+), 28 deletions(-)
rename arch/mips/{include/asm => mach-malta/include/mach}/gt64120.h (92%)
delete mode 100644 arch/mips/mach-malta/include/mach/mach-gt64120.h
diff --git a/arch/mips/boards/qemu-malta/lowlevel.S b/arch/mips/boards/qemu-malta/lowlevel.S
index 541d62fc2a..09087ad916 100644
--- a/arch/mips/boards/qemu-malta/lowlevel.S
+++ b/arch/mips/boards/qemu-malta/lowlevel.S
@@ -11,10 +11,9 @@
#include <asm/pbl_macros.h>
#include <asm/pbl_nmon.h>
#include <linux/sizes.h>
-
#include <asm/addrspace.h>
-#include <asm/gt64120.h>
-#include <mach/mach-gt64120.h>
+
+#include <mach/gt64120.h>
#ifdef CONFIG_CPU_LITTLE_ENDIAN
#define GT_CPU_TO_LE32(x) (x)
diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/mach-malta/include/mach/gt64120.h
similarity index 92%
rename from arch/mips/include/asm/gt64120.h
rename to arch/mips/mach-malta/include/mach/gt64120.h
index 34d2382593..f8a257acb7 100644
--- a/arch/mips/include/asm/gt64120.h
+++ b/arch/mips/mach-malta/include/mach/gt64120.h
@@ -6,12 +6,15 @@
* Maciej W. Rozycki <macro@mips.com>
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
*/
-#ifndef _ASM_GT64120_H
-#define _ASM_GT64120_H
-#define MSK(n) ((1 << (n)) - 1)
+#ifndef _MALTA_GT64120_H
+#define _MALTA_GT64120_H
-#define GT_DEF_BASE 0x14000000
+#define GT_DEF_BASE 0x14000000
+#define MIPS_GT_BASE 0x1be00000
+#define GT64120_BASE CKSEG1ADDR(MIPS_GT_BASE)
+
+#define MSK(n) ((1 << (n)) - 1)
/*
* Register offset addresses
@@ -85,4 +88,4 @@
#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs))
#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data))
-#endif /* _ASM_GT64120_H */
+#endif /* _MALTA_GT64120_H */
diff --git a/arch/mips/mach-malta/include/mach/mach-gt64120.h b/arch/mips/mach-malta/include/mach/mach-gt64120.h
deleted file mode 100644
index 20ac4d94d6..0000000000
--- a/arch/mips/mach-malta/include/mach/mach-gt64120.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/*
- * This is a direct copy of the ev96100.h file, with a global
- * search and replace. The numbers are the same.
- *
- * The reason I'm duplicating this is so that the 64120/96100
- * defines won't be confusing in the source code.
- */
-#ifndef _ASM_MACH_MIPS_MACH_GT64120_DEP_H
-#define _ASM_MACH_MIPS_MACH_GT64120_DEP_H
-
-#define MIPS_GT_BASE 0x1be00000
-
-#define GT64120_BASE CKSEG1ADDR(MIPS_GT_BASE)
-
-#endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */
diff --git a/arch/mips/mach-malta/pci.c b/arch/mips/mach-malta/pci.c
index 0ab239f509..c9c1c7790b 100644
--- a/arch/mips/mach-malta/pci.c
+++ b/arch/mips/mach-malta/pci.c
@@ -7,11 +7,9 @@
#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/addrspace.h>
-
#include <linux/pci.h>
-#include <asm/gt64120.h>
-#include <mach/mach-gt64120.h>
+#include <mach/gt64120.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
--
2.41.0
next prev parent reply other threads:[~2023-07-25 5:08 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-25 5:05 [PATCH 00/21] MIPS: semi-random code improvements Denis Orlov
2023-07-25 5:05 ` [PATCH 01/21] MIPS: addrspace: rectify ksseg segment naming Denis Orlov
2023-07-25 5:05 ` [PATCH 02/21] MIPS: addrspace: simplify the header Denis Orlov
2023-07-25 5:05 ` [PATCH 03/21] MIPS: main_entry-pbl: remove unused variable Denis Orlov
2023-07-25 5:05 ` [PATCH 04/21] MIPS: barebox.lds: remove extra whitespace Denis Orlov
2023-07-25 5:05 ` [PATCH 05/21] MIPS: reloc: mark relocate_code() as noreturn Denis Orlov
2023-07-25 5:05 ` [PATCH 06/21] MIPS: cpuinfo: use appropriate format specifiers in printf Denis Orlov
2023-07-25 5:05 ` [PATCH 07/21] MIPS: print BadVAddr CP0 register on exception Denis Orlov
2023-07-25 5:05 ` Denis Orlov [this message]
2023-07-25 5:05 ` [PATCH 09/21] MIPS: pbl_macros: use .asciiz instead of .ascii + .byte 0 Denis Orlov
2023-07-25 5:05 ` [PATCH 10/21] MIPS: malta: remove duplicated barebox magic code Denis Orlov
2023-07-25 5:05 ` [PATCH 11/21] MIPS: pbl: put mips_barebox_10h into ENTRY_FUNCTION Denis Orlov
2023-07-25 5:05 ` [PATCH 12/21] MIPS: pbl: make sure to disable interrupts/watchpoints on entry Denis Orlov
2023-07-25 5:05 ` [PATCH 13/21] MIPS: pbl: do enable 64-bit addressing in PBL Denis Orlov
2023-07-25 5:05 ` [PATCH 14/21] MIPS: clean up barebox proper entry point Denis Orlov
2023-07-25 5:05 ` [PATCH 15/21] MIPS: main_entry: properly set XTLB handler for 64-bit mode Denis Orlov
2023-07-25 5:05 ` [PATCH 16/21] MIPS: main_entry: remove exception vector array Denis Orlov
2023-07-25 5:05 ` [PATCH 17/21] MIPS: c-r4k: prettify code in __BUILD_BLAST_CACHE_RANGE Denis Orlov
2023-07-25 5:05 ` [PATCH 18/21] MIPS: c-r4k: generate blast_*cache functions via macros Denis Orlov
2023-07-25 5:05 ` [PATCH 19/21] MIPS: c-r4k: do flush secondary cache Denis Orlov
2023-07-25 5:05 ` [PATCH 20/21] MIPS: c-r4k: remove extra function declaration Denis Orlov
2023-07-25 5:05 ` [PATCH 21/21] MIPS: reloc: use IS_ALIGNED macro to check for an alignment Denis Orlov
2023-07-27 5:09 ` [PATCH 00/21] MIPS: semi-random code improvements Sascha Hauer
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