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* [PATCH] ddr: imx8m: add comment and print out prior to first DDRC read
@ 2023-07-06 16:16 Ahmad Fatoum
  2023-07-07  6:25 ` Marco Felsch
  2023-07-26 13:38 ` Sascha Hauer
  0 siblings, 2 replies; 3+ messages in thread
From: Ahmad Fatoum @ 2023-07-06 16:16 UTC (permalink / raw)
  To: barebox; +Cc: Ahmad Fatoum

If board code low level entry forgets to call imx8m*_early_clock_init
before DRAM setup, write access to DRAM controller will seem to work,
but the first read access will hang the system.

Make debugging this board bring up mistake easier by adding a debug
print along with a comment.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/ddr/imx8m/ddr_init.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/ddr/imx8m/ddr_init.c b/drivers/ddr/imx8m/ddr_init.c
index 944cc3873e0c..9a86280d9c73 100644
--- a/drivers/ddr/imx8m/ddr_init.c
+++ b/drivers/ddr/imx8m/ddr_init.c
@@ -106,7 +106,11 @@ int imx8m_ddr_init(struct dram_timing_info *dram_timing,
 	reg32_write(DDRC_RFSHCTL3(0), 0x0000001);
 	reg32_write(DDRC_PWRCTL(0), 0xa0);
 
-	/* if ddr type is LPDDR4, do it */
+	pr_debug("checking ddr type\n");
+	/*
+	 * below is first read, so if boot hangs here, imx8m*_early_clock_init()
+	 * might not have been called
+	 */
 	tmp = reg32_read(DDRC_MSTR(0));
 	if (tmp & (0x1 << 5) && ddrc_type != DDRC_TYPE_MN)
 		reg32_write(DDRC_DDR_SS_GPR0, 0x01); /* LPDDR4 mode */
-- 
2.39.2




^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] ddr: imx8m: add comment and print out prior to first DDRC read
  2023-07-06 16:16 [PATCH] ddr: imx8m: add comment and print out prior to first DDRC read Ahmad Fatoum
@ 2023-07-07  6:25 ` Marco Felsch
  2023-07-26 13:38 ` Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Marco Felsch @ 2023-07-07  6:25 UTC (permalink / raw)
  To: Ahmad Fatoum; +Cc: barebox

On 23-07-06, Ahmad Fatoum wrote:
> If board code low level entry forgets to call imx8m*_early_clock_init
> before DRAM setup, write access to DRAM controller will seem to work,
> but the first read access will hang the system.
> 
> Make debugging this board bring up mistake easier by adding a debug
> print along with a comment.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>

> ---
>  drivers/ddr/imx8m/ddr_init.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/ddr/imx8m/ddr_init.c b/drivers/ddr/imx8m/ddr_init.c
> index 944cc3873e0c..9a86280d9c73 100644
> --- a/drivers/ddr/imx8m/ddr_init.c
> +++ b/drivers/ddr/imx8m/ddr_init.c
> @@ -106,7 +106,11 @@ int imx8m_ddr_init(struct dram_timing_info *dram_timing,
>  	reg32_write(DDRC_RFSHCTL3(0), 0x0000001);
>  	reg32_write(DDRC_PWRCTL(0), 0xa0);
>  
> -	/* if ddr type is LPDDR4, do it */
> +	pr_debug("checking ddr type\n");
> +	/*
> +	 * below is first read, so if boot hangs here, imx8m*_early_clock_init()
> +	 * might not have been called
> +	 */
>  	tmp = reg32_read(DDRC_MSTR(0));
>  	if (tmp & (0x1 << 5) && ddrc_type != DDRC_TYPE_MN)
>  		reg32_write(DDRC_DDR_SS_GPR0, 0x01); /* LPDDR4 mode */
> -- 
> 2.39.2
> 
> 
> 



^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] ddr: imx8m: add comment and print out prior to first DDRC read
  2023-07-06 16:16 [PATCH] ddr: imx8m: add comment and print out prior to first DDRC read Ahmad Fatoum
  2023-07-07  6:25 ` Marco Felsch
@ 2023-07-26 13:38 ` Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2023-07-26 13:38 UTC (permalink / raw)
  To: Ahmad Fatoum; +Cc: barebox

On Thu, Jul 06, 2023 at 06:16:40PM +0200, Ahmad Fatoum wrote:
> If board code low level entry forgets to call imx8m*_early_clock_init
> before DRAM setup, write access to DRAM controller will seem to work,
> but the first read access will hang the system.
> 
> Make debugging this board bring up mistake easier by adding a debug
> print along with a comment.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  drivers/ddr/imx8m/ddr_init.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)

Applied, thanks

Sascha

> 
> diff --git a/drivers/ddr/imx8m/ddr_init.c b/drivers/ddr/imx8m/ddr_init.c
> index 944cc3873e0c..9a86280d9c73 100644
> --- a/drivers/ddr/imx8m/ddr_init.c
> +++ b/drivers/ddr/imx8m/ddr_init.c
> @@ -106,7 +106,11 @@ int imx8m_ddr_init(struct dram_timing_info *dram_timing,
>  	reg32_write(DDRC_RFSHCTL3(0), 0x0000001);
>  	reg32_write(DDRC_PWRCTL(0), 0xa0);
>  
> -	/* if ddr type is LPDDR4, do it */
> +	pr_debug("checking ddr type\n");
> +	/*
> +	 * below is first read, so if boot hangs here, imx8m*_early_clock_init()
> +	 * might not have been called
> +	 */
>  	tmp = reg32_read(DDRC_MSTR(0));
>  	if (tmp & (0x1 << 5) && ddrc_type != DDRC_TYPE_MN)
>  		reg32_write(DDRC_DDR_SS_GPR0, 0x01); /* LPDDR4 mode */
> -- 
> 2.39.2
> 
> 
> 

-- 
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Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2023-07-26 13:39 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2023-07-06 16:16 [PATCH] ddr: imx8m: add comment and print out prior to first DDRC read Ahmad Fatoum
2023-07-07  6:25 ` Marco Felsch
2023-07-26 13:38 ` Sascha Hauer

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