From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: Re: [PATCH] ARM: dts: phycore-stm32mp15: Use upstream dts
Date: Wed, 20 Sep 2023 13:44:25 +0200 [thread overview]
Message-ID: <20230920114425.GT637806@pengutronix.de> (raw)
In-Reply-To: <20230920112932.2790725-1-s.hauer@pengutronix.de>
On Wed, Sep 20, 2023 at 01:29:32PM +0200, Sascha Hauer wrote:
> The phycore-stm32mp15 board has long been mainlined. Switch the
> board to use the upstream dts files.
>
> This at least has the effect that now the PMIC is probed as our
> downstream dts hasn't enabled the i2c4 node.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../dts/stm32mp157c-phycore-stm32mp1-3.dts | 16 +-
> ...stm32mp157c-phycore-stm32mp15-pinctrl.dtsi | 92 ------
> .../stm32mp157c-phycore-stm32mp15-som.dtsi | 271 ------------------
> 3 files changed, 2 insertions(+), 377 deletions(-)
> delete mode 100644 arch/arm/dts/stm32mp157c-phycore-stm32mp15-pinctrl.dtsi
> delete mode 100644 arch/arm/dts/stm32mp157c-phycore-stm32mp15-som.dtsi
>
> diff --git a/arch/arm/dts/stm32mp157c-phycore-stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp157c-phycore-stm32mp15-pinctrl.dtsi
> deleted file mode 100644
> index aa41006c23..0000000000
> --- a/arch/arm/dts/stm32mp157c-phycore-stm32mp15-pinctrl.dtsi
> +++ /dev/null
> @@ -1,92 +0,0 @@
> -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
> -/*
> - * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
> - * Author: Dom VOVARD <dom.vovard@linrt.com>.
> - */
> -#include <arm/st/stm32mp15-pinctrl.dtsi>
> -
> -ðernet0_rgmii_pins_a {
> - pins1 {
> - pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
> - <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
> - <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
> - <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
> - <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
> - <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
> - <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
> - <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
> - bias-disable;
> - drive-push-pull;
> - slew-rate = <2>;
> - };
This is correct, but upstream dts currently uses:
<STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
instead of:
<STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
I'll fix that up here and send a patch for the Kernel to get this fixed
upstream.
Sascha
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prev parent reply other threads:[~2023-09-20 11:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 11:29 Sascha Hauer
2023-09-20 11:44 ` Sascha Hauer [this message]
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