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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 11/19] ARM: layerscape: implement ls1028a errata
Date: Thu,  4 Jan 2024 15:17:38 +0100	[thread overview]
Message-ID: <20240104141746.165014-12-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20240104141746.165014-1-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-layerscape/errata.c | 49 +++++++++++++++++++++++++++++++
 include/mach/layerscape/errata.h  |  2 ++
 2 files changed, 51 insertions(+)

diff --git a/arch/arm/mach-layerscape/errata.c b/arch/arm/mach-layerscape/errata.c
index fe0d0ab45e..deab584243 100644
--- a/arch/arm/mach-layerscape/errata.c
+++ b/arch/arm/mach-layerscape/errata.c
@@ -2,6 +2,7 @@
 #include <common.h>
 #include <io.h>
 #include <soc/fsl/immap_lsch2.h>
+#include <soc/fsl/immap_lsch3.h>
 #include <soc/fsl/fsl_ddr_sdram.h>
 #include <asm/system.h>
 #include <mach/layerscape/errata.h>
@@ -22,6 +23,15 @@ static void erratum_a008997_ls1021a(void)
 	set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB1);
 }
 
+static void erratum_a008997_ls1028a(void)
+{
+	void __iomem *dcsr = IOMEM(LSCH3_DCSR_BASE);
+
+	clrsetbits_le32(dcsr + LSCH3_DCSR_USB_IOCR1,
+			0x7f << 11,
+			LSCH3_DCSR_USB_PCSTXSWINGFULL << 11);
+}
+
 static void erratum_a008997_ls1046a(void)
 {
 	u32 __iomem *scfg = (u32 __iomem *)LSCH2_SCFG_ADDR;
@@ -56,6 +66,11 @@ static inline void set_usb_txvreftune(u32 __iomem *scfg, u32 offset)
 	scfg_clrsetbits32(scfg + offset / 4, 0xf << 6, SCFG_USB_TXVREFTUNE << 6);
 }
 
+static void erratum_a009007_ls1028a(void)
+{
+	erratum_a009007(IOMEM(LSCH3_DCSR_BASE), 0x0000, 0x0080, 0x0380, 0x0b80);
+}
+
 static void erratum_a009008_ls1021a(void)
 {
 	u32 __iomem *scfg = IOMEM(LSCH2_SCFG_ADDR);
@@ -111,6 +126,26 @@ static void erratum_a008850_early(struct ccsr_cci400 __iomem *cci,
 	ddr_out32(&ddr->eor, DDR_EOR_RD_REOD_DIS | DDR_EOR_WD_REOD_DIS);
 }
 
+/*
+ * This erratum requires a register write before being Memory
+ * controller 3 being enabled.
+ */
+static void erratum_a008514(void)
+{
+	u32 *eddrtqcr1;
+
+	eddrtqcr1 = IOMEM(LSCH3_DCSR_DDR3_ADDR) + 0x800;
+	out_le32(eddrtqcr1, 0x63b20002);
+}
+
+static void erratum_a009798(void)
+{
+        u32 __iomem *scfg = IOMEM(LSCH3_SCFG_BASE);
+
+        clrbits_be32(scfg + LSCH3_SCFG_USB3PRM1CR / 4,
+                        LSCH3_SCFG_USB_SQRXTUNE_MASK << 23);
+}
+
 void ls1046a_errata(void)
 {
 	erratum_a008850_early(IOMEM(LSCH2_CCI400_ADDR), IOMEM(LSCH2_DDR_ADDR));
@@ -129,6 +164,15 @@ void ls1021a_errata(void)
 	erratum_a009007_ls1021a();
 }
 
+void ls1028a_errata(void)
+{
+	erratum_a008850_early(IOMEM(LSCH3_CCI400_ADDR), IOMEM(LSCH3_DDR_ADDR));
+	erratum_a009007_ls1028a();
+	erratum_a008997_ls1028a();
+	erratum_a008514();
+	erratum_a009798();
+}
+
 static void erratum_a008850_post(struct ccsr_cci400 __iomem *cci,
 				 struct ccsr_ddr __iomem *ddr)
 {
@@ -228,3 +272,8 @@ void ls1021a_errata_post_ddr(void)
 {
 	erratum_a008850_post(IOMEM(LSCH2_CCI400_ADDR), IOMEM(LSCH2_DDR_ADDR));
 }
+
+void ls1028a_errata_post_ddr(void)
+{
+	erratum_a008850_post(IOMEM(LSCH3_CCI400_ADDR), IOMEM(LSCH3_DDR_ADDR));
+}
diff --git a/include/mach/layerscape/errata.h b/include/mach/layerscape/errata.h
index 4755031717..0611bd5f0f 100644
--- a/include/mach/layerscape/errata.h
+++ b/include/mach/layerscape/errata.h
@@ -4,8 +4,10 @@
 #define __MACH_ERRATA_H
 
 void ls1046a_errata(void);
+void ls1028a_errata(void);
 void ls1021a_errata(void);
 void ls1046a_errata_post_ddr(void);
+void ls1028a_errata_post_ddr(void);
 void ls1021a_errata_post_ddr(void);
 
 #endif /* __MACH_ERRATA_H */
-- 
2.39.2




  parent reply	other threads:[~2024-01-04 14:19 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-04 14:17 [PATCH 00/19] ARM: add Layerscape LS1028a support Sascha Hauer
2024-01-04 14:17 ` [PATCH 01/19] soc/fsl: import immap_lsch3 from U-Boot Sascha Hauer
2024-01-04 14:17 ` [PATCH 02/19] soc/fsl/immap_lsch2.h: cleanup Sascha Hauer
2024-01-04 14:17 ` [PATCH 03/19] ARM: layerscape: decide SCFG endianess during runtime Sascha Hauer
2024-01-04 14:17 ` [PATCH 04/19] ARM: layerscape: cleanup erratum_a009007 Sascha Hauer
2024-01-04 14:17 ` [PATCH 05/19] ARM: layerscape: cleanup erratum_a008997 Sascha Hauer
2024-01-04 14:17 ` [PATCH 06/19] ARM: layerscape: cleanup erratum_a009798 Sascha Hauer
2024-01-04 14:17 ` [PATCH 07/19] ARM: layerscape: drop wrong errata workaround Sascha Hauer
2024-01-04 14:17 ` [PATCH 08/19] ARM: layerscape: cleanup erratum_a009008 Sascha Hauer
2024-01-29 17:27   ` Uwe Kleine-König
2024-01-04 14:17 ` [PATCH 09/19] ARM: Layerscape: pass base addresses to errata functions Sascha Hauer
2024-01-04 14:17 ` [PATCH 10/19] ARM: Layerscape: add layerscape_uart_putc() Sascha Hauer
2024-01-04 14:17 ` Sascha Hauer [this message]
2024-01-04 14:17 ` [PATCH 12/19] ARM: layerscape: implement ls1028a debug_ll Sascha Hauer
2024-01-04 14:17 ` [PATCH 13/19] include: <asm-generic/bug.h>: implement ASSERT() Sascha Hauer
2024-01-04 14:17 ` [PATCH 14/19] ARM: Layerscape: add tzc400 support Sascha Hauer
2024-01-29 17:32   ` Uwe Kleine-König
2024-01-04 14:17 ` [PATCH 15/19] ARM: Add ls1028a lowlevel init Sascha Hauer
2024-01-04 14:17 ` [PATCH 16/19] ARM: atf: add bl31 v2 calling method Sascha Hauer
2024-01-04 14:17 ` [PATCH 17/19] mci: imx-esdhc-pbl: factor out common function Sascha Hauer
2024-01-04 14:17 ` [PATCH 18/19] mci: imx-esdhc-pbl: implement esdhc xload for ls1028a Sascha Hauer
2024-01-29 17:36   ` Uwe Kleine-König
2024-01-30  7:11     ` Sascha Hauer
2024-01-04 14:17 ` [PATCH 19/19] ARM: Layerscape: add basic support for NXP LS1028a RDB Sascha Hauer
2024-01-04 16:32   ` Uwe Kleine-König

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