From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 02/10] ARM: Layerscape: LS1028a: reserve DDR region for TF-A
Date: Tue, 9 Jan 2024 10:15:55 +0100 [thread overview]
Message-ID: <20240109091603.235589-3-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20240109091603.235589-1-s.hauer@pengutronix.de>
On LS1028a the TF-A is placed in DDR, so we have to reserve the region
in order to keep Linux away from it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-layerscape/soc.c | 2 ++
drivers/mci/imx-esdhc-pbl.c | 3 ++-
include/mach/layerscape/layerscape.h | 8 ++++++++
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-layerscape/soc.c b/arch/arm/mach-layerscape/soc.c
index 4d4ef05d4b..5f9d0d5171 100644
--- a/arch/arm/mach-layerscape/soc.c
+++ b/arch/arm/mach-layerscape/soc.c
@@ -91,6 +91,8 @@ static int ls1028a_init(void)
layerscape_register_pbl_image_handler();
+ reserve_sdram_region("tfa", LS1028A_TFA_RESERVED_START, LS1028A_TFA_RESERVED_SIZE);
+
return 0;
}
diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c
index 2c74d101e4..2d071eaca8 100644
--- a/drivers/mci/imx-esdhc-pbl.c
+++ b/drivers/mci/imx-esdhc-pbl.c
@@ -21,6 +21,7 @@
#endif
#ifdef CONFIG_ARCH_LAYERSCAPE
#include <mach/layerscape/xload.h>
+#include <mach/layerscape/layerscape.h>
#endif
#include "sdhci.h"
#include "imx-esdhc.h"
@@ -387,7 +388,7 @@ static int ls1028a_esdhc_start_image(void __iomem *base, struct dram_regions_inf
.socdata = &data,
};
void *sdram = (void *)0x80000000;
- void (*bl31)(void) = (void *)0xfbe00000;
+ void (*bl31)(void) = (void *)LS1028A_TFA_RESERVED_START;
size_t bl31_size;
void *bl31_image;
struct bl2_to_bl31_params_mem_v2 *params;
diff --git a/include/mach/layerscape/layerscape.h b/include/mach/layerscape/layerscape.h
index a048b7ef9e..6f420dd4f4 100644
--- a/include/mach/layerscape/layerscape.h
+++ b/include/mach/layerscape/layerscape.h
@@ -3,6 +3,8 @@
#ifndef __MACH_LAYERSCAPE_H
#define __MACH_LAYERSCAPE_H
+#include <linux/sizes.h>
+
#define LS1046A_DDR_SDRAM_BASE 0x80000000
#define LS1046A_DDR_FREQ 2100000000
@@ -16,6 +18,12 @@
#define LS1028A_SP_SHARED_DRAM_SIZE SZ_2M
#define LS1028A_TZC400_BASE 0x01100000
+#define LS1028A_TFA_SIZE SZ_64M
+#define LS1028A_TFA_SHRD SZ_2M
+#define LS1028A_TFA_RESERVED_SIZE (LS1028A_TFA_SIZE + LS1028A_TFA_SHRD)
+#define LS1028A_TFA_RESERVED_START (0x100000000 - LS1028A_TFA_RESERVED_SIZE)
+#define LS1028A_TFA_START (0x100000000 - LS1028A_TFA_SIZE)
+
enum bootsource ls1046a_bootsource_get(void);
enum bootsource ls1021a_bootsource_get(void);
--
2.39.2
next prev parent reply other threads:[~2024-01-09 9:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-09 9:15 [PATCH 00/10] Add more Layerscape LS1028a stuff Sascha Hauer
2024-01-09 9:15 ` [PATCH 01/10] ARM: Layerscape: consolidate initcalls into one Sascha Hauer
2024-01-09 9:15 ` Sascha Hauer [this message]
2024-01-09 9:37 ` [PATCH 02/10] ARM: Layerscape: LS1028a: reserve DDR region for TF-A Ahmad Fatoum
2024-01-09 10:25 ` Sascha Hauer
2024-01-09 9:15 ` [PATCH 03/10] ARM: Layerscape: icid: make readonly arrays const Sascha Hauer
2024-01-09 9:15 ` [PATCH 04/10] ARM: Layerscape: icid: rename functions Sascha Hauer
2024-01-09 9:15 ` [PATCH 05/10] ARM: Layerscape: icid: move re-usable code to separate functions Sascha Hauer
2024-01-09 9:34 ` Ahmad Fatoum
2024-01-09 9:15 ` [PATCH 06/10] ARM: Layerscape: icids: factor out setup_icid_offsets() Sascha Hauer
2024-01-09 9:16 ` [PATCH 07/10] immap_lsch3: Add more stuff Sascha Hauer
2024-01-09 9:16 ` [PATCH 08/10] ARM: Layerscape: LS1028a: fixup icids Sascha Hauer
2024-01-09 9:28 ` Ahmad Fatoum
2024-01-09 9:16 ` [PATCH 09/10] ARM: psci: make header self contained Sascha Hauer
2024-01-09 9:27 ` Ahmad Fatoum
2024-01-09 9:16 ` [PATCH 10/10] ARM: Layerscape: LS1028a: fixup psci node Sascha Hauer
2024-01-09 9:26 ` Ahmad Fatoum
2024-01-09 9:37 ` Sascha Hauer
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