[PATCH v2 10/11] ARM: layerscape: configure all DMA masters to be cache-coherent

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

Upstream device tree now has /soc/dma-coherent, which breaks USB in
Linux v6.1 when kernel is booted with barebox. Fix this by:

  - setting the snoop bits for the DMA masters, so we properly support
    Linux >= v6.1 DTs

  - fixing up cache coherency setting into kernel DT whenever barebox
    DT has /soc/dma-coherent to support older device trees

The latter is done automatically when OF_DMA_COHERENCY is selected, so
add the missing snoop bits here.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
v1 -> v2:
  - remove DT fixups introduced earlier
  - DT fixup split into previous commit
---
 arch/arm/Kconfig                            |  1 +
 arch/arm/dts/fsl-ls1046a.dtsi               | 21 ---------------------
 arch/arm/mach-layerscape/lowlevel-ls1046a.c | 10 ++++++----
 include/soc/fsl/immap_lsch2.h               |  7 +++++++
 4 files changed, 14 insertions(+), 25 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0557567a599f..089ce43c88bd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -246,6 +246,7 @@ config ARCH_LAYERSCAPE
 	select OFTREE
 	select OFDEVICE
 	select ARM_USE_COMPRESSED_DTB
+	select OF_DMA_COHERENCY
 
 config ARCH_OMAP_MULTI
 	bool "TI OMAP"
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 6af38f737056..a661cb0c8970 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -5,24 +5,3 @@ aliases {
 		mmc0 = &esdhc;
 	};
 };
-
-&soc {
-	/delete-property/ dma-coherent;
-	dma-noncoherent;
-};
-
-&crypto {
-	dma-coherent;
-};
-
-&msi1 {
-	dma-coherent;
-};
-
-&pcie2 {
-	dma-coherent;
-};
-
-&pcie3 {
-	dma-coherent;
-};
diff --git a/arch/arm/mach-layerscape/lowlevel-ls1046a.c b/arch/arm/mach-layerscape/lowlevel-ls1046a.c
index 3393dc49031e..1307c05eaf6d 100644
--- a/arch/arm/mach-layerscape/lowlevel-ls1046a.c
+++ b/arch/arm/mach-layerscape/lowlevel-ls1046a.c
@@ -229,11 +229,13 @@ void ls1046a_init_lowlevel(void)
 	set_cntfrq(25000000);
 	syscnt_enable(IOMEM(LSCH2_SYS_COUNTER_ADDR));
 
-	/* Make SEC reads and writes snoopable */
+	/* Make DMA master reads and writes snoopable */
 	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
-		SCFG_SNPCNFGCR_SECWRSNP |
-		SCFG_SNPCNFGCR_SATARDSNP |
-		SCFG_SNPCNFGCR_SATAWRSNP);
+		SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP |
+		SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP |
+		SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP |
+		SCFG_SNPCNFGCR_USB3WRSNP | SCFG_SNPCNFGCR_SATARDSNP |
+		SCFG_SNPCNFGCR_SATAWRSNP | SCFG_SNPCNFGCR_EDMASNP);
 
 	/*
 	 * Enable snoop requests and DVM message requests for
diff --git a/include/soc/fsl/immap_lsch2.h b/include/soc/fsl/immap_lsch2.h
index 0993fa1cd85a..6a7dad3d5d0d 100644
--- a/include/soc/fsl/immap_lsch2.h
+++ b/include/soc/fsl/immap_lsch2.h
@@ -314,6 +314,13 @@ struct ls102xa_ccsr_gur {
 #define SCFG_SNPCNFGCR_SECWRSNP		0x40000000
 #define SCFG_SNPCNFGCR_SATARDSNP	0x00800000
 #define SCFG_SNPCNFGCR_SATAWRSNP	0x00400000
+#define SCFG_SNPCNFGCR_USB1RDSNP	0x00200000
+#define SCFG_SNPCNFGCR_USB1WRSNP	0x00100000
+#define SCFG_SNPCNFGCR_EDMASNP		0x00020000
+#define SCFG_SNPCNFGCR_USB2RDSNP	0x00008000
+#define SCFG_SNPCNFGCR_USB2WRSNP	0x00010000
+#define SCFG_SNPCNFGCR_USB3RDSNP	0x00002000
+#define SCFG_SNPCNFGCR_USB3WRSNP	0x00004000
 
 /* RGMIIPCR bit definitions*/
 #define SCFG_RGMIIPCR_EN_AUTO		BIT(3)
-- 
2.39.2