[PATCH] Documentation: riscv: bring BeagleV Starlight docs up-to-date

[PATCH] Documentation: riscv: bring BeagleV Starlight docs up-to-date

[Ahmad Fatoum]

The BeagleV Starlight hasn't exited the Beta phase and the BeagleV name
is now associated with the BeagleV-Ahead, which used a different SoC.

Note this in the section title and also adjust the build instruction to
make them reproducible in 2024:

  - Given that the board is discontinued, it's not worthwhile to move
    away from the vendor's OpenSBI fork, so pin the revision that was
    used for initial bring-up

  - fence.i is no longer part of the default -march=rv64imafdc in
    recent toolchains, therefore add it explicitly into the ISA string.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 Documentation/boards/riscv.rst | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/boards/riscv.rst b/Documentation/boards/riscv.rst
index 92f663cfb9e6..ade1443c9704 100644
--- a/Documentation/boards/riscv.rst
+++ b/Documentation/boards/riscv.rst
@@ -60,8 +60,8 @@ into the config file.
 
 See https://barebox.org/jsbarebox/?graphic=1 for a live example.
 
-BeagleV
--------
+BeagleV Starlight
+-----------------
 
 barebox has second-stage support for the BeagleV Starlight::
 
@@ -73,11 +73,12 @@ to opensbi::
 
   git clone https://github.com/starfive-tech/opensbi
   cd opensbi
+  git checkout 2524b0ecd8684b42bc7a4c69794f40f11cbbe2a5
   export ARCH=riscv
   export PLATFORM=starfive/vic7100
   export FW_PAYLOAD_PATH=$BAREBOX/build/images/barebox-beaglev-starlight.img
 
-  make ARCH=riscv
+  make PLATFORM_RISCV_ISA=rv64imafdc_zifencei
   ./fsz.sh ./build/platform/starfive/vic7100/firmware/fw_payload.bin fw_payload.bin.out
   ls -l $OPENSBI/build/platform/starfive/vic7100/firmware/fw_payload.bin.out
 
-- 
2.39.2

Re: [PATCH] Documentation: riscv: bring BeagleV Starlight docs up-to-date

[Antony Pavlov]

On Fri, 22 Mar 2024 15:24:41 +0100
Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:

Hi Ahmad!

> The BeagleV Starlight hasn't exited the Beta phase and the BeagleV name
> is now associated with the BeagleV-Ahead, which used a different SoC.
> 
> Note this in the section title and also adjust the build instruction to
> make them reproducible in 2024:
> 
>   - Given that the board is discontinued, it's not worthwhile to move
>     away from the vendor's OpenSBI fork, so pin the revision that was
>     used for initial bring-up
> 
>   - fence.i is no longer part of the default -march=rv64imafdc in
>     recent toolchains, therefore add it explicitly into the ISA string.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  Documentation/boards/riscv.rst | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/boards/riscv.rst b/Documentation/boards/riscv.rst
> index 92f663cfb9e6..ade1443c9704 100644
> --- a/Documentation/boards/riscv.rst
> +++ b/Documentation/boards/riscv.rst
> @@ -60,8 +60,8 @@ into the config file.
>  
>  See https://barebox.org/jsbarebox/?graphic=1 for a live example.
>  
> -BeagleV
> --------
> +BeagleV Starlight
> +-----------------
>  
>  barebox has second-stage support for the BeagleV Starlight::
>  
> @@ -73,11 +73,12 @@ to opensbi::
>  
>    git clone https://github.com/starfive-tech/opensbi
>    cd opensbi
> +  git checkout 2524b0ecd8684b42bc7a4c69794f40f11cbbe2a5
>    export ARCH=riscv
>    export PLATFORM=starfive/vic7100
>    export FW_PAYLOAD_PATH=$BAREBOX/build/images/barebox-beaglev-starlight.img
>  
> -  make ARCH=riscv
> +  make PLATFORM_RISCV_ISA=rv64imafdc_zifencei
>    ./fsz.sh ./build/platform/starfive/vic7100/firmware/fw_payload.bin fw_payload.bin.out
>    ls -l $OPENSBI/build/platform/starfive/vic7100/firmware/fw_payload.bin.out
>  
> -- 
> 2.39.2
> 

At the moment I have no BeagleV Starlight board at hand.
I can get it back for testing barebox in several days.

However here are my changes to the BeagleV Starlight barebox build process documentation:

--- a/Documentation/boards/riscv.rst
+++ b/Documentation/boards/riscv.rst
@@ -66,7 +66,7 @@ BeagleV Starlight
 barebox has second-stage support for the BeagleV Starlight::
 
   make ARCH=riscv rv64i_defconfig
-  make
+  make ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu-
 
 Thie resulting ``./images/barebox-beaglev-starlight.img`` can be used as payload
 to opensbi::
@@ -75,21 +75,24 @@ to opensbi::
   cd opensbi
   git checkout 2524b0ecd8684b42bc7a4c69794f40f11cbbe2a5
   export ARCH=riscv
+  export CROSS_COMPILE=riscv64-linux-gnu-
   export PLATFORM=starfive/vic7100
-  export FW_PAYLOAD_PATH=$BAREBOX/build/images/barebox-beaglev-starlight.img
+  export FW_PAYLOAD_PATH=$(cd .. && pwd)/images/barebox-beaglev-starlight.img
 
   make PLATFORM_RISCV_ISA=rv64imafdc_zifencei
+  wget https://raw.githubusercontent.com/starfive-tech/freelight-u-sdk/JH7100_VisionFive/fsz.sh
+  chmod +x fsz.sh
   ./fsz.sh ./build/platform/starfive/vic7100/firmware/fw_payload.bin fw_payload.bin.out
-  ls -l $OPENSBI/build/platform/starfive/vic7100/firmware/fw_payload.bin.out
+  ls -l ./build/platform/starfive/vic7100/firmware/fw_payload.bin.out
 
-The resulting ``./platform/starfive/vic7100/firmware/fw_payload.bin.out`` can then
+The resulting ``./build/platform/starfive/vic7100/firmware/fw_payload.bin.out`` can then
 be flashed via Xmodem to the board::
 
   picocom -b 115200 /dev/ttyUSB0 --send-cmd "sx -vv" --receive-cmd "rx -vv"
   0:update uboot
   select the function: 0␤
   send file by xmodem
-  ^A^S./platform/starfive/vic7100/firmware/fw_payload.bin.out␤
+  ^A^S./build/platform/starfive/vic7100/firmware/fw_payload.bin.out␤
 
 After reset, barebox should then boot to shell and attempt booting kernel ``Image``
 and device tree ``jh7100-starlight.dtb`` from the first root partition with the same

-- 
Best regards,
  Antony Pavlov