From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 09/16] pci: pcie-designware: Speed up waiting for link
Date: Tue, 26 Mar 2024 11:07:39 +0100 [thread overview]
Message-ID: <20240326100746.471532-10-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20240326100746.471532-1-s.hauer@pengutronix.de>
When the link is not up the first time we test for it, then we wait for
100ms before trying again. This adds unnecessary delays when the link
is up considerably faster than 100ms. As we do not have anything useful
to do with our CPU time during polling for link we can equally well poll
as fast as we can.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/pci/pcie-designware.c | 8 +++++---
drivers/pci/pcie-designware.h | 4 ----
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c
index 9c8bc772f9..72820de282 100644
--- a/drivers/pci/pcie-designware.c
+++ b/drivers/pci/pcie-designware.c
@@ -237,15 +237,17 @@ void dw_pcie_disable_atu(struct dw_pcie *pci, int index,
int dw_pcie_wait_for_link(struct dw_pcie *pci)
{
- int retries;
+ u64 start = get_time_ns();
/* Check if the link is up or not */
- for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) {
+ while (1) {
if (dw_pcie_link_up(pci)) {
dev_dbg(pci->dev, "Link up\n");
return 0;
}
- udelay(LINK_WAIT_USLEEP_MAX);
+
+ if (is_timeout(start, SECOND))
+ break;
}
dev_err(pci->dev, "Phy link never came up\n");
diff --git a/drivers/pci/pcie-designware.h b/drivers/pci/pcie-designware.h
index 9840dde266..96a269dc59 100644
--- a/drivers/pci/pcie-designware.h
+++ b/drivers/pci/pcie-designware.h
@@ -13,10 +13,6 @@
#include <linux/bitfield.h>
-/* Parameters for the waiting for link up routine */
-#define LINK_WAIT_MAX_RETRIES 10
-#define LINK_WAIT_USLEEP_MAX 100000
-
/* Parameters for the waiting for iATU enabled routine */
#define LINK_WAIT_MAX_IATU_RETRIES 5
#define LINK_WAIT_IATU_MAX 10000
--
2.39.2
next prev parent reply other threads:[~2024-03-26 10:09 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-26 10:07 [PATCH 00/16] PCI: support non 1:1 mappings Sascha Hauer
2024-03-26 10:07 ` [PATCH 01/16] net: phy: realtek: add phy for RTL8168 internal phy Sascha Hauer
2024-03-26 10:07 ` [PATCH 02/16] pci: add 'self' member to struct pci_bus Sascha Hauer
2024-03-26 10:07 ` [PATCH 03/16] pci: rename parent_bus to parent Sascha Hauer
2024-03-26 10:07 ` [PATCH 04/16] add support for resource lists Sascha Hauer
2024-03-26 10:07 ` [PATCH 05/16] pci: pcie-designware: remove unused variable Sascha Hauer
2024-03-26 10:07 ` [PATCH 06/16] pci: dwc: Drop support for config space in 'ranges' Sascha Hauer
2024-03-26 10:07 ` [PATCH 07/16] pci: add pci_controller_init() Sascha Hauer
2024-03-26 10:07 ` [PATCH 08/16] pci: support non 1:1 mappings Sascha Hauer
2024-03-26 10:07 ` Sascha Hauer [this message]
2024-03-26 10:07 ` [PATCH 10/16] pci: pcie-dw-rockchip: wait for link Sascha Hauer
2024-03-26 10:07 ` [PATCH 11/16] pci: drop resources from struct pci_bus Sascha Hauer
2024-03-26 10:07 ` [PATCH 12/16] pci: add of_pci_bridge_init() Sascha Hauer
2024-04-04 6:18 ` [PATCH v2] " Sascha Hauer
2024-03-26 10:07 ` [PATCH 13/16] pci: pcie-designware: drop duplicate resource assigning Sascha Hauer
2024-03-26 10:07 ` [PATCH 14/16] pci: pcie-designware: remove dra7xx quirks Sascha Hauer
2024-03-26 10:07 ` [PATCH 15/16] pci: pcie-designware: iterate over windows Sascha Hauer
2024-03-26 10:07 ` [PATCH 16/16] ARM: dts: rk3588-rock-5b: remove pci ranges quirks Sascha Hauer
2024-04-02 8:39 ` [PATCH 00/16] PCI: support non 1:1 mappings Sascha Hauer
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