* [PATCH v2 1/4] arm: dts: copy pf5 device tree from mainline linux
2024-04-12 13:32 [PATCH v2 0/4] arm: boards: add wolfvision pf5 mainboard Michael Riesch
@ 2024-04-12 13:32 ` Michael Riesch
2024-04-12 13:32 ` [PATCH v2 2/4] arm: dts: add common state for wolfvision boards Michael Riesch
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Michael Riesch @ 2024-04-12 13:32 UTC (permalink / raw)
To: barebox; +Cc: Michael Riesch
The device tree for the WolfVision PF5 mainboard and the overlay for
the PF5 IO Expander have been accepted for inclusion in Linux v6.10:
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/log/?h=v6.10-armsoc/dts64
Once the device tree changes are merged and then integrated into
barebox these files should vanish.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
...rk3568-wolfvision-pf5-io-expander-upstream.dtso | 137 ++++++
arch/arm/dts/rk3568-wolfvision-pf5-upstream.dts | 528 +++++++++++++++++++++
2 files changed, 665 insertions(+)
diff --git a/arch/arm/dts/rk3568-wolfvision-pf5-io-expander-upstream.dtso b/arch/arm/dts/rk3568-wolfvision-pf5-io-expander-upstream.dtso
new file mode 100644
index 0000000000..ebcaeafc38
--- /dev/null
+++ b/arch/arm/dts/rk3568-wolfvision-pf5-io-expander-upstream.dtso
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for the WolfVision PF5 IO Expander board.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rk3568-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ gmac0_clkin: external-gmac0-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ clock-output-names = "gmac0_clkin";
+ #clock-cells = <0>;
+ };
+
+ usb_host_vbus: usb-host-vbus-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_vbus_en>;
+ regulator-name = "usb_host_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v_in>;
+ };
+
+ vcc1v8_eth: vcc1v8-eth-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc1v8_eth_en>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "1v8_eth";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc3v3_eth: vcc3v3-eth-regulator {
+ compatible = "regulator-fixed";
+ enable-active-low;
+ gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_eth_enn>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "3v3_eth";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+};
+
+&gmac0 {
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>,
+ <&cru SCLK_GMAC0>;
+ assigned-clock-parents = <&cru SCLK_GMAC0_RMII_SPEED>,
+ <&gmac0_clkin>;
+ clock_in_out = "input";
+ phy-handle = <&dp83826>;
+ phy-mode = "rmii";
+ phy-supply = <&vcc3v3_eth>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_clkinout
+ &gmac0_rx_er
+ &gmac0_rx_bus2
+ &gmac0_tx_bus2>;
+ status = "okay";
+};
+
+&mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dp83826: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_wake_intn ð_phy_rstn>;
+ reset-assert-us = <1000>;
+ reset-deassert-us = <2000>;
+ reset-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+};
+
+&pinctrl {
+ ethernet {
+ eth_wake_intn: eth-wake-intn-pinctrl {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ eth_phy_rstn: eth-phy-rstn-pinctrl {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc1v8_eth_en: vcc1v8-eth-en-pinctrl {
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc3v3_eth_enn: vcc3v3-eth-enn-pinctrl {
+ rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_host_vbus_en: usb-host-vbus-en-pinctrl {
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&usb_host1_xhci {
+ maximum-speed = "high-speed";
+ phys = <&usb2phy0_host>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&usb_host_vbus>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-wolfvision-pf5-upstream.dts b/arch/arm/dts/rk3568-wolfvision-pf5-upstream.dts
new file mode 100644
index 0000000000..1160d1370e
--- /dev/null
+++ b/arch/arm/dts/rk3568-wolfvision-pf5-upstream.dts
@@ -0,0 +1,528 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree for the WolfVision PF5 mainboard.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/regulator/ti,tps62864.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <arm64/rockchip/rk3568.dtsi>
+
+/ {
+ model = "WolfVision PF5";
+ compatible = "wolfvision,rk3568-pf5", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 = &gmac0;
+ mmc0 = &sdhci;
+ rtc0 = &pcf85623;
+ rtc1 = &rk809;
+ };
+
+ chosen: chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ hdmi_tx: hdmi-tx-connector {
+ compatible = "hdmi-connector";
+ hdmi-pwr-supply = <&hdmi_tx_5v>;
+ type = "a";
+
+ port {
+ hdmi_tx_in: endpoint {
+ remote-endpoint = <&hdmi_tx_out>;
+ };
+ };
+ };
+
+ hdmi_tx_5v: hdmi-tx-5v-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_tx_5v_en>;
+ regulator-name = "hdmi_tx_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v_in>;
+ };
+
+ pdm_codec: pdm-codec {
+ compatible = "dmic-codec";
+ num-channels = <1>;
+ #sound-dai-cells = <0>;
+ };
+
+ pdm_sound: pdm-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "microphone";
+
+ simple-audio-card,cpu {
+ sound-dai = <&pdm>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ vcc12v_cam: vcc12v-cam-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc12v_cam_en>;
+ regulator-name = "12v_cam";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ vin-supply = <&vcc12v_in>;
+ };
+
+ vcc12v_in: vcc12v-in-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "12v_in";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc3v8_cam: vcc3v8-cam-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v8_cam_en>;
+ regulator-name = "3v8_cam";
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ vin-supply = <&vcc5v_in>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v_in>;
+ };
+
+ vcc5v_in: vcc5v-in-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "5v_in";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_in>;
+ };
+};
+
+&combphy0 {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vcc0v9_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vcc0v9_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vcc0v9_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vcc0v9_cpu>;
+};
+
+&gpu {
+ mali-supply = <&vcc0v9_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ avdd-0v9-supply = <&vcc0v9a_image>;
+ avdd-1v8-supply = <&vcc1v8a_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_tx_out: endpoint {
+ remote-endpoint = <&hdmi_tx_in>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ vcc1-supply = <&vcc5v_in>;
+ vcc2-supply = <&vcc5v_in>;
+ vcc3-supply = <&vcc5v_in>;
+ vcc4-supply = <&vcc5v_in>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc5v_in>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vcc0v9_logic: DCDC_REG1 {
+ regulator-name = "0v9_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc0v9_gpu: DCDC_REG2 {
+ regulator-name = "0v9_gpu";
+ regulator-always-on;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v1_ddr4: DCDC_REG3 {
+ regulator-name = "1v1_ddr4";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc0v9_npu: DCDC_REG4 {
+ regulator-name = "0v9_npu";
+ regulator-always-on;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8: DCDC_REG5 {
+ regulator-name = "1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc0v9a_image: LDO_REG1 {
+ regulator-name = "0v9a_image";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc0v9a: LDO_REG2 {
+ regulator-name = "0v9a";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc0v9a_pmu: LDO_REG3 {
+ regulator-name = "0v9a_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vcc3v3_acodec: LDO_REG4 {
+ regulator-name = "3v3_acodec";
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: LDO_REG5 {
+ regulator-name = "3v3_sd";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc1v8a: LDO_REG7 {
+ regulator-name = "1v8a";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8a_pmu: LDO_REG8 {
+ regulator-name = "1v8a_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v8a_image: LDO_REG9 {
+ regulator-name = "1v8a_image";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sw: SWITCH_REG1 {
+ regulator-name = "3v3_sw";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ regulator@42 {
+ compatible = "ti,tps62869";
+ reg = <0x42>;
+
+ regulators {
+ vcc0v9_cpu: SW {
+ regulator-name = "0v9_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <TPS62864_MODE_FPWM>;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1150000>;
+ vin-supply = <&vcc5v_in>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ pcf85623: rtc@51 {
+ compatible = "nxp,pcf85263";
+ reg = <0x51>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&clk32k_in>;
+ quartz-load-femtofarads = <12500>;
+ };
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3m0_xfer>;
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4m1_xfer>;
+};
+
+&pdm {
+ pinctrl-0 = <&pdmm0_clk
+ &pdmm0_sdi0>;
+ status = "okay";
+};
+
+&pinctrl {
+ cam {
+ vcc12v_cam_en: vcc12v-cam-en-pinctrl {
+ rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc3v8_cam_en: vcc3v8-cam-en-pinctrl {
+ rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hdmitx {
+ hdmi_tx_5v_en: hdmi-tx-5v-en-pinctrl {
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l-pinctrl {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vcc3v3_acodec>;
+ vccio2-supply = <&vcc1v8>;
+ vccio3-supply = <&vcc3v3_sd>;
+ vccio4-supply = <&vcc1v8>;
+ vccio5-supply = <&vcc1v8>;
+ vccio6-supply = <&vcc3v3_sw>;
+ vccio7-supply = <&vcc3v3_sw>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc1v8a>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
+ vmmc-supply = <&vcc3v3_sw>;
+ vqmmc-supply = <&vcc1v8>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ /* The following quirks are required since the bInterval is 1 and we
+ * handle steady ISOC streaming. See Usecase 3 in commit 729dcffd1ed3
+ * ("usb: dwc3: gadget: Add support for disabling U1 and U2 entries").
+ */
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+ /*
+ * Without this quirk the available fifosize seems to be miscalculated
+ * in cases where many endpoints are used. In one particular situation
+ * 8 IN EPs and 3 OUT EPs where selected and lead to stalled transfers
+ * without the resize quirk.
+ */
+ tx-fifo-resize;
+
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP2>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 2/4] arm: dts: add common state for wolfvision boards
2024-04-12 13:32 [PATCH v2 0/4] arm: boards: add wolfvision pf5 mainboard Michael Riesch
2024-04-12 13:32 ` [PATCH v2 1/4] arm: dts: copy pf5 device tree from mainline linux Michael Riesch
@ 2024-04-12 13:32 ` Michael Riesch
2024-04-12 13:32 ` [PATCH v2 3/4] common: add wolfvision board code library Michael Riesch
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Michael Riesch @ 2024-04-12 13:32 UTC (permalink / raw)
To: barebox; +Cc: Michael Riesch
Add a common state device tree include that features
- the boot state
- the MAC address
envisaged for the use in all WolfVision boards.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
arch/arm/dts/wolfvision-state.dtsi | 71 ++++++++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/arch/arm/dts/wolfvision-state.dtsi b/arch/arm/dts/wolfvision-state.dtsi
new file mode 100644
index 0000000000..f246a1a4a8
--- /dev/null
+++ b/arch/arm/dts/wolfvision-state.dtsi
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Common state definition for WolfVision boards.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/ {
+ aliases {
+ state = &state;
+ };
+
+ state: state {
+ compatible = "barebox,state";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ backend-type = "raw";
+ backend = <&barebox_state>;
+ backend-stridesize = <1024>;
+ magic = <0xef784236>;
+
+ bootstate {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ system1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts@0 {
+ reg = <0x0 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+
+ priority@4 {
+ reg = <0x4 0x4>;
+ type = "uint32";
+ default = <21>;
+ };
+ };
+
+ system2 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts@8 {
+ reg = <0x8 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+
+ priority@c {
+ reg = <0xc 0x4>;
+ type = "uint32";
+ default = <20>;
+ };
+ };
+
+ last_chosen@10 {
+ reg = <0x10 0x4>;
+ type = "uint32";
+ };
+ };
+
+ mac-address@14 {
+ reg = <0x14 0x6>;
+ type = "mac";
+ };
+ };
+};
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 3/4] common: add wolfvision board code library
2024-04-12 13:32 [PATCH v2 0/4] arm: boards: add wolfvision pf5 mainboard Michael Riesch
2024-04-12 13:32 ` [PATCH v2 1/4] arm: dts: copy pf5 device tree from mainline linux Michael Riesch
2024-04-12 13:32 ` [PATCH v2 2/4] arm: dts: add common state for wolfvision boards Michael Riesch
@ 2024-04-12 13:32 ` Michael Riesch
2024-04-12 13:32 ` [PATCH v2 4/4] arm: boards: add wolfvision pf5 mainboard Michael Riesch
2024-04-16 13:34 ` [PATCH v2 0/4] " Sascha Hauer
4 siblings, 0 replies; 6+ messages in thread
From: Michael Riesch @ 2024-04-12 13:32 UTC (permalink / raw)
To: barebox; +Cc: Michael Riesch
Add board code library for all WolfVision boards.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
common/boards/Kconfig | 3 +
common/boards/Makefile | 1 +
common/boards/wolfvision/Makefile | 2 +
common/boards/wolfvision/common.c | 142 +++++++++++++++++++++++++++++++++++++
include/boards/wolfvision/common.h | 32 +++++++++
5 files changed, 180 insertions(+)
diff --git a/common/boards/Kconfig b/common/boards/Kconfig
index f6d4a56f88..a2a51155ea 100644
--- a/common/boards/Kconfig
+++ b/common/boards/Kconfig
@@ -14,3 +14,6 @@ config BOARD_PHYTEC_SOM_IMX8M_DETECTION
config BOARD_TQ
select CRC_ITU_T
bool
+
+config BOARD_WOLFVISION
+ bool
diff --git a/common/boards/Makefile b/common/boards/Makefile
index 147c36643d..3f8ac57b2f 100644
--- a/common/boards/Makefile
+++ b/common/boards/Makefile
@@ -3,3 +3,4 @@
obj-$(CONFIG_BOARD_QEMU_VIRT) += qemu-virt/
obj-$(CONFIG_BOARD_PHYTEC_SOM_DETECTION) += phytec/
obj-$(CONFIG_BOARD_TQ) += tq/
+obj-$(CONFIG_BOARD_WOLFVISION) += wolfvision/
diff --git a/common/boards/wolfvision/Makefile b/common/boards/wolfvision/Makefile
new file mode 100644
index 0000000000..b2be4b73f4
--- /dev/null
+++ b/common/boards/wolfvision/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-pbl-y += common.o
diff --git a/common/boards/wolfvision/common.c b/common/boards/wolfvision/common.c
new file mode 100644
index 0000000000..f483918cec
--- /dev/null
+++ b/common/boards/wolfvision/common.c
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Common board code functions WolfVision boards.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+#define pr_fmt(fmt) "boards: wolfvision: " fmt
+
+#include <common.h>
+#include <aiodev.h>
+#include <net.h>
+#include <state.h>
+
+#include <boards/wolfvision/common.h>
+
+#define WV_RK3568_HWID_TOLERANCE 50
+
+int wolfvision_apply_overlay(const struct wv_overlay *overlay, char **files)
+{
+ int ret;
+
+ if (overlay->filename) {
+ if (*files) {
+ char *old = *files;
+ *files = basprintf("%s %s", old, overlay->filename);
+ free(old);
+ } else {
+ *files = basprintf("%s", overlay->filename);
+ }
+ }
+
+ if (overlay->data) {
+ struct device_node *node =
+ of_unflatten_dtb(overlay->data, INT_MAX);
+
+ if (IS_ERR(node)) {
+ pr_err("Cannot unflatten dtbo\n");
+ return PTR_ERR(node);
+ }
+
+ ret = of_overlay_apply_tree(of_get_root_node(), node);
+
+ of_delete_node(node);
+
+ if (ret) {
+ pr_err("Cannot apply overlay: %pe\n", ERR_PTR(ret));
+ return ret;
+ }
+
+ of_clk_init();
+ of_probe();
+ }
+
+ return 0;
+}
+
+int wolfvision_register_ethaddr(void)
+{
+ struct device_node *eth0;
+ struct state *state;
+ char mac[ETH_ALEN];
+ int ret;
+
+ ret = of_device_ensure_probed_by_alias("state");
+ if (ret)
+ return ret;
+
+ state = state_by_name("state");
+ if (!state)
+ return -ENOENT;
+
+ ret = state_read_mac(state, "mac-address", mac);
+ if (ret)
+ return ret;
+
+ if (!is_valid_ether_addr(mac))
+ return -EINVAL;
+
+ eth0 = of_find_node_by_alias(of_get_root_node(), "ethernet0");
+ if (eth0)
+ of_eth_register_ethaddr(eth0, mac);
+
+ return 0;
+}
+
+static int wolfvision_rk3568_get_hwid(int chan_idx)
+{
+ const int values[WV_RK3568_HWID_MAX] = {
+ 0, 112, 225, 337, 450, 562, 675, 787, 900,
+ 1012, 1125, 1237, 1350, 1462, 1575, 1687, 1800,
+ };
+ int ret, hwid, voltage;
+ char *chan_name;
+
+ chan_name = basprintf("saradc.in_value%d_mV", chan_idx);
+ ret = aiochannel_name_get_value(chan_name, &voltage);
+ free(chan_name);
+ if (ret)
+ return ret;
+
+ for (hwid = 0; hwid < ARRAY_SIZE(values); hwid++)
+ if (abs(voltage - values[hwid]) < WV_RK3568_HWID_TOLERANCE)
+ return hwid;
+
+ return -EINVAL;
+};
+
+int wolfvision_rk3568_detect_hw(const struct wv_rk3568_extension *extensions,
+ int num_extensions, char **overlays)
+{
+ int i, hwid, ret;
+
+ ret = of_device_ensure_probed_by_alias("saradc");
+ if (ret)
+ return ret;
+
+ for (i = 0; i < num_extensions; i++) {
+ const struct wv_rk3568_extension *extension = &extensions[i];
+ const struct wv_overlay *overlay;
+
+ ret = wolfvision_rk3568_get_hwid(extension->adc_chan);
+ if (ret < 0) {
+ pr_warning("Could not retrieve %s HWID (%d)\n",
+ extension->name, ret);
+ continue;
+ }
+
+ hwid = ret;
+ overlay = &extension->overlays[hwid];
+ if (overlay->name) {
+ pr_info("Detected %s %s\n", overlay->name,
+ extension->name);
+ wolfvision_apply_overlay(overlay, overlays);
+ } else {
+ pr_warning("Detected unknown %s HWID %d\n",
+ extension->name, hwid);
+ }
+ }
+
+ return 0;
+}
diff --git a/include/boards/wolfvision/common.h b/include/boards/wolfvision/common.h
new file mode 100644
index 0000000000..a9bf6acbbb
--- /dev/null
+++ b/include/boards/wolfvision/common.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Common board code functions WolfVision boards.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+#ifndef _BOARDS_WOLFVISION_COMMON_H
+#define _BOARDS_WOLFVISION_COMMON_H
+
+#define WV_RK3568_HWID_MAX 17
+
+struct wv_overlay {
+ const char *name;
+ const char *filename;
+ const void *data;
+};
+
+struct wv_rk3568_extension {
+ int adc_chan;
+ const char *name;
+ const struct wv_overlay overlays[WV_RK3568_HWID_MAX];
+};
+
+int wolfvision_apply_overlay(const struct wv_overlay *overlay, char **files);
+
+int wolfvision_register_ethaddr(void);
+
+int wolfvision_rk3568_detect_hw(const struct wv_rk3568_extension *extensions,
+ int num_extensions, char **overlays);
+
+#endif /* _BOARDS_WOLFVISION_COMMON_H */
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 4/4] arm: boards: add wolfvision pf5 mainboard
2024-04-12 13:32 [PATCH v2 0/4] arm: boards: add wolfvision pf5 mainboard Michael Riesch
` (2 preceding siblings ...)
2024-04-12 13:32 ` [PATCH v2 3/4] common: add wolfvision board code library Michael Riesch
@ 2024-04-12 13:32 ` Michael Riesch
2024-04-16 13:34 ` [PATCH v2 0/4] " Sascha Hauer
4 siblings, 0 replies; 6+ messages in thread
From: Michael Riesch @ 2024-04-12 13:32 UTC (permalink / raw)
To: barebox; +Cc: Michael Riesch
Add support for the WolfVision PF5 mainboard, which features the Rockchip
RK3568 SoC and can be extended with different expansion boards.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/wolfvision-pf5/.gitignore | 1 +
arch/arm/boards/wolfvision-pf5/Makefile | 3 +
arch/arm/boards/wolfvision-pf5/board.c | 88 ++++++++++++++++++++++
arch/arm/boards/wolfvision-pf5/lowlevel.c | 36 +++++++++
arch/arm/dts/Makefile | 3 +
.../arm/dts/rk3568-wolfvision-pf5-io-expander.dtso | 11 +++
arch/arm/dts/rk3568-wolfvision-pf5.dts | 48 ++++++++++++
arch/arm/mach-rockchip/Kconfig | 9 +++
images/Makefile.rockchip | 1 +
10 files changed, 201 insertions(+)
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 84e777092d..98eab17af2 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -204,3 +204,4 @@ obj-$(CONFIG_MACH_RADXA_ROCK5) += radxa-rock5/
obj-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += variscite-dt8mcustomboard-imx8mp/
obj-$(CONFIG_MACH_RADXA_CM3) += radxa-cm3/
obj-$(CONFIG_MACH_TQMA93XX) += tqma93xx/
+obj-$(CONFIG_MACH_WOLFVISION_PF5) += wolfvision-pf5/
diff --git a/arch/arm/boards/wolfvision-pf5/.gitignore b/arch/arm/boards/wolfvision-pf5/.gitignore
new file mode 100644
index 0000000000..f458f794b5
--- /dev/null
+++ b/arch/arm/boards/wolfvision-pf5/.gitignore
@@ -0,0 +1 @@
+sdram-init.bin
diff --git a/arch/arm/boards/wolfvision-pf5/Makefile b/arch/arm/boards/wolfvision-pf5/Makefile
new file mode 100644
index 0000000000..b37b6c870b
--- /dev/null
+++ b/arch/arm/boards/wolfvision-pf5/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/wolfvision-pf5/board.c b/arch/arm/boards/wolfvision-pf5/board.c
new file mode 100644
index 0000000000..797f51bc2e
--- /dev/null
+++ b/arch/arm/boards/wolfvision-pf5/board.c
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Board code for the WolfVision PF5 mainboard.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+#include <common.h>
+#include <deep-probe.h>
+#include <globalvar.h>
+#include <init.h>
+
+#include <boards/wolfvision/common.h>
+#include <mach/rockchip/bbu.h>
+
+#define PF5_IO_EXPANDER_FILENAME "rk3568-wolfvision-pf5-io-expander.dtbo"
+#define PF5_IO_EXPANDER_DATA __dtbo_rk3568_wolfvision_pf5_io_expander_start
+
+enum {
+ PF5_HWID_CHANNEL_MAINBOARD = 1,
+ PF5_HWID_CHANNEL_MODULE = 2,
+};
+
+extern char PF5_IO_EXPANDER_DATA[];
+
+static const struct wv_rk3568_extension pf5_extensions[] = {
+ {
+ .adc_chan = PF5_HWID_CHANNEL_MAINBOARD,
+ .name = "mainboard",
+ .overlays = {
+ [0] = { .name = "PF5 DC V1.0 A", },
+ [4] = { .name = "PF5 DC V1.1 A", },
+ },
+ },
+ {
+ .adc_chan = PF5_HWID_CHANNEL_MODULE,
+ .name = "module",
+ .overlays = {
+ [0] = { .name = "PF5 IO Expander V1.0 A",
+ .filename = PF5_IO_EXPANDER_FILENAME,
+ .data = PF5_IO_EXPANDER_DATA,
+ },
+ [16] = { .name = "no", },
+ },
+ },
+};
+
+static int pf5_probe(struct device *dev)
+{
+ char *pf5_overlays = NULL;
+ int ret;
+
+ barebox_set_model("WolfVision PF5");
+ barebox_set_hostname("PF5");
+
+ ret = wolfvision_register_ethaddr();
+ if (ret)
+ pr_warning("failed to register MAC addresses\n");
+
+ rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc0");
+
+ ret = wolfvision_rk3568_detect_hw(
+ pf5_extensions, ARRAY_SIZE(pf5_extensions), &pf5_overlays);
+ if (ret)
+ pr_warning("failed to detect HW\n");
+
+ if (pf5_overlays)
+ globalvar_set("of.overlay.filepattern", pf5_overlays);
+
+ free(pf5_overlays);
+
+ return 0;
+}
+
+static const struct of_device_id pf5_of_match[] = {
+ {
+ .compatible = "wolfvision,rk3568-pf5",
+ },
+ { /* sentinel */ },
+};
+
+static struct driver_d pf5_board_driver = {
+ .name = "board-wolfvision-pf5",
+ .probe = pf5_probe,
+ .of_compatible = pf5_of_match,
+};
+coredevice_platform_driver(pf5_board_driver);
+
+BAREBOX_DEEP_PROBE_ENABLE(pf5_of_match);
diff --git a/arch/arm/boards/wolfvision-pf5/lowlevel.c b/arch/arm/boards/wolfvision-pf5/lowlevel.c
new file mode 100644
index 0000000000..c20ca4ae13
--- /dev/null
+++ b/arch/arm/boards/wolfvision-pf5/lowlevel.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0-only
+#include <common.h>
+#include <linux/sizes.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/rockchip/hardware.h>
+#include <mach/rockchip/atf.h>
+#include <debug_ll.h>
+#include <mach/rockchip/rockchip.h>
+
+extern char __dtb_rk3568_wolfvision_pf5_start[];
+
+ENTRY_FUNCTION(start_rk3568_wolfvision_pf5, r0, r1, r2)
+{
+ /*
+ * Enable vccio4 1.8V and vccio5 1.8V
+ * FIXME: This is done by the io-domain driver as well, but there
+ * currently is no mechanism to make sure the driver gets probed
+ * before its consumers. Remove this setup once this issue is
+ * resolved.
+ */
+ writel(RK_SETBITS(0x30), 0xfdc20140);
+
+ /*
+ * Image execution starts at 0x0, but this is used for ATF and
+ * OP-TEE later, so move away from here.
+ */
+ if (current_el() == 3)
+ relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS);
+ else
+ relocate_to_current_adr();
+
+ setup_c();
+
+ rk3568_barebox_entry(__dtb_rk3568_wolfvision_pf5_start);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7671b9e2ad..e4af867027 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -186,6 +186,7 @@ lwl-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o
lwl-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
lwl-$(CONFIG_MACH_WEBASTO_CCBV2) += imx6ul-webasto-ccbv2.dtb.o
lwl-$(CONFIG_MACH_WEBASTO_CCBV2) += imx6ul-webasto-marvel.dtb.o
+lwl-$(CONFIG_MACH_WOLFVISION_PF5) += rk3568-wolfvision-pf5.dtb.o
lwl-$(CONFIG_MACH_ZII_RDU1) += \
imx51-zii-rdu1.dtb.o \
imx51-zii-scu2-mezz.dtb.o \
@@ -230,4 +231,6 @@ lwl-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += imx8mp-var-dart-dt8mcusto
lwl-$(CONFIG_MACH_TQMA93XX) += imx93-tqma9352-mba93xxca.dtb.o \
imx93-tqma9352-mba93xxla.dtb.o
+obj-$(CONFIG_MACH_WOLFVISION_PF5) += rk3568-wolfvision-pf5-io-expander.dtbo.o
+
clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z
diff --git a/arch/arm/dts/rk3568-wolfvision-pf5-io-expander.dtso b/arch/arm/dts/rk3568-wolfvision-pf5-io-expander.dtso
new file mode 100644
index 0000000000..37b48afd2d
--- /dev/null
+++ b/arch/arm/dts/rk3568-wolfvision-pf5-io-expander.dtso
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for the WolfVision PF5 IO Expander board.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "rk3568-wolfvision-pf5-io-expander-upstream.dtso"
diff --git a/arch/arm/dts/rk3568-wolfvision-pf5.dts b/arch/arm/dts/rk3568-wolfvision-pf5.dts
new file mode 100644
index 0000000000..e214842ee4
--- /dev/null
+++ b/arch/arm/dts/rk3568-wolfvision-pf5.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree for the WolfVision PF5 mainboard.
+ *
+ * Copyright (C) 2024 WolfVision GmbH.
+ */
+
+/dts-v1/;
+#include "rk3568-wolfvision-pf5-upstream.dts"
+#include "rk356x.dtsi"
+#include "wolfvision-state.dtsi"
+
+/ {
+ aliases {
+ saradc = &saradc;
+ };
+
+ chosen: chosen {
+ environment-emmc {
+ compatible = "barebox,environment";
+ device-path = &environment_emmc;
+ };
+ };
+ /*
+ memory@a00000 {
+ device_type = "memory";
+ reg = <0x0 0x00a00000 0x0 0x7f600000>;
+ };
+ */
+};
+
+&sdhci {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ environment_emmc: partition@408000 {
+ label = "barebox-environment";
+ reg = <0x0 0x408000 0x0 0x8000>;
+ };
+
+ barebox_state: partition@410000 {
+ reg = <0x0 0x410000 0x0 0x8000>;
+ label = "state";
+ };
+ };
+};
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 0e2b7810bc..f373624f5c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -115,6 +115,15 @@ config MACH_RADXA_CM3
help
Say Y here if you are using a Radxa CM3
+config MACH_WOLFVISION_PF5
+ select ARCH_RK3568
+ select AIODEV
+ select BOARD_WOLFVISION
+ select ROCKCHIP_SARADC
+ bool "WolfVision PF5 mainboard"
+ help
+ Say Y here if you are using a WolfVision PF5 mainboard
+
endif
comment "select board features:"
diff --git a/images/Makefile.rockchip b/images/Makefile.rockchip
index ceacfde10d..e344e893a0 100644
--- a/images/Makefile.rockchip
+++ b/images/Makefile.rockchip
@@ -36,3 +36,4 @@ $(call build_rockchip_image, CONFIG_MACH_PROTONIC_MECSBC, start_mecsbc, protonic
$(call build_rockchip_image, CONFIG_MACH_RADXA_ROCK3, start_rock3a, radxa-rock3/sdram-init.bin, rock3a)
$(call build_rockchip_image, CONFIG_MACH_RADXA_ROCK5, start_rock5b, radxa-rock5/sdram-init.bin, rock5b)
$(call build_rockchip_image, CONFIG_MACH_RADXA_CM3, start_radxa_cm3_io, radxa-cm3/sdram-init.bin, radxa-cm3-io)
+$(call build_rockchip_image, CONFIG_MACH_WOLFVISION_PF5, start_rk3568_wolfvision_pf5, wolfvision-pf5/sdram-init.bin, rk3568-wolfvision-pf5)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v2 0/4] arm: boards: add wolfvision pf5 mainboard
2024-04-12 13:32 [PATCH v2 0/4] arm: boards: add wolfvision pf5 mainboard Michael Riesch
` (3 preceding siblings ...)
2024-04-12 13:32 ` [PATCH v2 4/4] arm: boards: add wolfvision pf5 mainboard Michael Riesch
@ 2024-04-16 13:34 ` Sascha Hauer
4 siblings, 0 replies; 6+ messages in thread
From: Sascha Hauer @ 2024-04-16 13:34 UTC (permalink / raw)
To: barebox, Michael Riesch
On Fri, 12 Apr 2024 15:32:11 +0200, Michael Riesch wrote:
> Habidere,
>
> This series adds support for the WolfVision PF5 mainboard, which serves
> as base for recent WolfVision products. It features the Rockchip RK3568
> and can be extended with several different extension boards. The
> WolfVision PF5 IO Expander is one example of such an extension board.
> Support for this extension is also included in this series.
>
> [...]
Applied, thanks!
[1/4] arm: dts: copy pf5 device tree from mainline linux
https://git.pengutronix.de/cgit/barebox/commit/?id=50b1eceef4eb (link may not be stable)
[2/4] arm: dts: add common state for wolfvision boards
https://git.pengutronix.de/cgit/barebox/commit/?id=fdfa97893c38 (link may not be stable)
[3/4] common: add wolfvision board code library
https://git.pengutronix.de/cgit/barebox/commit/?id=5f20e518aad1 (link may not be stable)
[4/4] arm: boards: add wolfvision pf5 mainboard
https://git.pengutronix.de/cgit/barebox/commit/?id=69bfc54d6eb0 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
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