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From: Marco Felsch <m.felsch@pengutronix.de>
To: barebox@lists.infradead.org
Subject: Re: [PATCH 2/2] ARM: i.MX8M: add support to handle ROM SError ERR050350
Date: Tue, 30 Apr 2024 13:48:54 +0200	[thread overview]
Message-ID: <20240430114854.tnjlp3ptfwl75tzs@pengutronix.de> (raw)
In-Reply-To: <20240430112941.3207284-2-m.felsch@pengutronix.de>

On 24-04-30, Marco Felsch wrote:
> This ports U-Boot commit:
> 
> | commit 2f3c92060dcd6bc9cfd3e2e344a3e1745ca39f09
> | Author: Peng Fan <peng.fan@nxp.com>
> | Date:   Thu Jul 9 13:39:26 2020 +0800
> |
> |     imx8m: workaround ROM serror
> |
> |     ROM SError happens on two cases:
> |
> |     1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
> |     when ROM patch lock is fused, this write will cause SError.
> |
> |     2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
> |     is field return mode, but the last 4K of ROM is still protected and cause
> |     SError.
> |
> |     Since ROM mask SError until ATF unmask it, so then ATF always meets the
> |     exception. This patch works around the issue in SPL by enabling SPL
> |     Exception vectors table and the SError exception, take the exception
> |     to eret immediately to clear the SError.
> |
> |     Signed-off-by: Ye Li <ye.li@nxp.com>
> |     Signed-off-by: Peng Fan <peng.fan@nxp.com>
> 
> Other than U-Boot we don't support exceptions in PBL and therefore we
> can handle it simpler by installing an dummy exception table which does
> nothing. The table gets overriden by TF-A later on anyway.
> 
> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
> Hi all,
> 
> I'm not sure if the relocation should be done within the erratum
> handler or if we should move it into the lowlevel code per default for
> all i.MX8M platforms since the board files call it anyway after the
> lowlevel init. In the later case this would be an separate patch to drop
> the pattern:
> 
>  lowlevel_setup();
>  relocate_to_current_adr();
> 
> from the board files.

...

> diff --git a/arch/arm/mach-imx/errata.c b/arch/arm/mach-imx/errata.c
> new file mode 100644
> index 000000000000..ef8de91a9278
> --- /dev/null
> +++ b/arch/arm/mach-imx/errata.c
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +#include <asm/barebox-arm.h>
> +#include <asm/system.h>
> +#include <mach/imx/errata.h>
> +
> +#ifdef CONFIG_CPU_V8
> +
> +extern unsigned long early_imx8m_vectors;
> +
> +void erratum_050350_imx8m(void)
> +{
> +	if (current_el() != 3)
> +		return;
> +
> +	relocate_to_current_adr();

If I use:

	extern char early_imx8m_vectors[];

	addr = runtime_address(early_imx8m_vectors);

it does work without relocation too. This seems to fit better here. I
will send a v2 if you're okay with that.

Regards,
  Marco

> +
> +	asm volatile("msr vbar_el3, %0" : : "r" (&early_imx8m_vectors) : "cc");
> +	asm volatile("msr daifclr, #4;isb");
> +}



  reply	other threads:[~2024-04-30 11:49 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-30 11:29 [PATCH 1/2] ARM: aarch64: fix scr_el3 register setup Marco Felsch
2024-04-30 11:29 ` [PATCH 2/2] ARM: i.MX8M: add support to handle ROM SError ERR050350 Marco Felsch
2024-04-30 11:48   ` Marco Felsch [this message]
2024-05-03  7:20   ` Sascha Hauer
2024-05-06  7:58     ` Marco Felsch
2024-04-30 21:10 ` [PATCH 1/2] ARM: aarch64: fix scr_el3 register setup Marco Felsch

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