From: Marco Felsch <m.felsch@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 2/2] ARM: i.MX8M: add support to handle ROM SError ERR050350
Date: Mon, 6 May 2024 09:58:09 +0200 [thread overview]
Message-ID: <20240506075809.uobxclav7bdzmx76@pengutronix.de> (raw)
In-Reply-To: <ZjSQVPs3xsyJN-H4@pengutronix.de>
On 24-05-03, Sascha Hauer wrote:
> On Tue, Apr 30, 2024 at 01:29:41PM +0200, Marco Felsch wrote:
> > This ports U-Boot commit:
> >
> > | commit 2f3c92060dcd6bc9cfd3e2e344a3e1745ca39f09
> > | Author: Peng Fan <peng.fan@nxp.com>
> > | Date: Thu Jul 9 13:39:26 2020 +0800
> > |
> > | imx8m: workaround ROM serror
> > |
> > | ROM SError happens on two cases:
> > |
> > | 1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
> > | when ROM patch lock is fused, this write will cause SError.
> > |
> > | 2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
> > | is field return mode, but the last 4K of ROM is still protected and cause
> > | SError.
> > |
> > | Since ROM mask SError until ATF unmask it, so then ATF always meets the
> > | exception. This patch works around the issue in SPL by enabling SPL
> > | Exception vectors table and the SError exception, take the exception
> > | to eret immediately to clear the SError.
> > |
> > | Signed-off-by: Ye Li <ye.li@nxp.com>
> > | Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >
> > Other than U-Boot we don't support exceptions in PBL and therefore we
> > can handle it simpler by installing an dummy exception table which does
> > nothing. The table gets overriden by TF-A later on anyway.
> >
> > Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> > ---
> > Hi all,
> >
> > I'm not sure if the relocation should be done within the erratum
> > handler or if we should move it into the lowlevel code per default for
> > all i.MX8M platforms since the board files call it anyway after the
> > lowlevel init. In the later case this would be an separate patch to drop
> > the pattern:
> >
> > lowlevel_setup();
> > relocate_to_current_adr();
> >
> > from the board files.
> >
> > Regards,
> > Marco
> >
> > arch/arm/mach-imx/Makefile | 1 +
> > arch/arm/mach-imx/cpu_init.c | 12 +++++-
> > arch/arm/mach-imx/errata.c | 22 ++++++++++
> > arch/arm/mach-imx/imx8m_early_exceptions_64.S | 42 +++++++++++++++++++
> > include/mach/imx/errata.h | 12 ++++++
> > 5 files changed, 88 insertions(+), 1 deletion(-)
> > create mode 100644 arch/arm/mach-imx/errata.c
> > create mode 100644 arch/arm/mach-imx/imx8m_early_exceptions_64.S
> > create mode 100644 include/mach/imx/errata.h
> >
> > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> > index ce8af486aed4..d182f95673f5 100644
> > --- a/arch/arm/mach-imx/Makefile
> > +++ b/arch/arm/mach-imx/Makefile
> > @@ -34,6 +34,7 @@ obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o
> > pbl-$(CONFIG_USB_GADGET_DRIVER_ARC_PBL) += imx-udc.o
> > obj-$(CONFIG_RESET_IMX_SRC) += src.o
> > lwl-y += cpu_init.o
> > +lwl-y += errata.o imx8m_early_exceptions_64.o
>
> Should likely be:
>
> lwl-$(CONFIG_ARCH_IMX8M) += imx8m_early_exceptions_64.o
>
> Also you can drop the _64 suffix from the filename as the imx8m_ preifx
> already implies this.
Sure.
> > pbl-y += xload-spi.o xload-common.o xload-imx-nand.o xload-gpmi-nand.o
> > pbl-y += xload-qspi.o
> > obj-pbl-$(CONFIG_ARCH_IMX9) += ele.o
> > diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
> > index c5a47d9b9154..aebbd3defaec 100644
> > --- a/arch/arm/mach-imx/cpu_init.c
> > +++ b/arch/arm/mach-imx/cpu_init.c
> > @@ -6,6 +6,7 @@
> > #include <asm/errata.h>
> > #include <linux/types.h>
> > #include <linux/bitops.h>
> > +#include <mach/imx/errata.h>
> > #include <mach/imx/generic.h>
> > #include <mach/imx/imx7-regs.h>
> > #include <mach/imx/imx8mq-regs.h>
> > @@ -75,17 +76,26 @@ void imx8mm_cpu_lowlevel_init(void)
> > imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_SCTR);
> >
> > imx8m_cpu_lowlevel_init();
> > +
> > + erratum_050350_imx8m();
> > }
> >
> > void imx8mn_cpu_lowlevel_init(void)
> > __alias(imx8mm_cpu_lowlevel_init);
> >
> > void imx8mp_cpu_lowlevel_init(void)
> > - __alias(imx8mm_cpu_lowlevel_init);
> > +{
> > + /* ungate system counter */
> > + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_SCTR);
> > +
> > + imx8m_cpu_lowlevel_init();
> > +}
> >
> > void imx8mq_cpu_lowlevel_init(void)
> > {
> > imx8m_cpu_lowlevel_init();
> > +
> > + erratum_050350_imx8m();
> > }
> >
> > #define CCM_AUTHEN_TZ_NS BIT(9)
> > diff --git a/arch/arm/mach-imx/errata.c b/arch/arm/mach-imx/errata.c
> > new file mode 100644
> > index 000000000000..ef8de91a9278
> > --- /dev/null
> > +++ b/arch/arm/mach-imx/errata.c
> > @@ -0,0 +1,22 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +
> > +#include <asm/barebox-arm.h>
> > +#include <asm/system.h>
> > +#include <mach/imx/errata.h>
> > +
> > +#ifdef CONFIG_CPU_V8
> > +
> > +extern unsigned long early_imx8m_vectors;
> > +
> > +void erratum_050350_imx8m(void)
> > +{
> > + if (current_el() != 3)
> > + return;
> > +
> > + relocate_to_current_adr();
> > +
> > + asm volatile("msr vbar_el3, %0" : : "r" (&early_imx8m_vectors) : "cc");
> > + asm volatile("msr daifclr, #4;isb");
> > +}
> > +
> > +#endif /* CONFIG_CPU_V8 */
> > diff --git a/arch/arm/mach-imx/imx8m_early_exceptions_64.S b/arch/arm/mach-imx/imx8m_early_exceptions_64.S
> > new file mode 100644
> > index 000000000000..cd91e1a07b9c
> > --- /dev/null
> > +++ b/arch/arm/mach-imx/imx8m_early_exceptions_64.S
> > @@ -0,0 +1,42 @@
> > +/*
> > + * (C) Copyright 2013
> > + * David Feng <fenghua@phytium.com.cn>
> > + *
> > + * SPDX-License-Identifier: GPL-2.0+
> > + */
> > +
> > +#include <linux/linkage.h>
> > +
> > +#ifdef CONFIG_CPU_V8
> > +
> > +/*
> > + * Early exception vectors.
> > + */
> > + .align 11
> > + .globl early_imx8m_vectors
> > +early_imx8m_vectors:
> > + .align 7
> > + eret
> > +
> > + .align 7
> > + eret
> > +
> > + .align 7
> > + eret
> > +
> > + .align 7
> > + eret
> > +
> > + .align 7
> > + eret
> > +
> > + .align 7
> > + eret
> > +
> > + .align 7
> > + eret
> > +
> > + .align 7
> > + eret
> > +
> > +#endif /* CONFIG_CPU_V8 */
> > diff --git a/include/mach/imx/errata.h b/include/mach/imx/errata.h
> > new file mode 100644
> > index 000000000000..f63342d446fc
> > --- /dev/null
> > +++ b/include/mach/imx/errata.h
> > @@ -0,0 +1,12 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +
> > +#ifndef __MACH_IMX_ERRATA_H
> > +#define __MACH_IMX_ERRATA_H
> > +
> > +#ifdef CONFIG_CPU_V8
>
> No need to ifdef function prototypes.
Yes you're right.
Regards,
Marco
>
> Sascha
>
> --
> Pengutronix e.K. | |
> Steuerwalder Str. 21 | http://www.pengutronix.de/ |
> 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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>
next prev parent reply other threads:[~2024-05-06 7:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-30 11:29 [PATCH 1/2] ARM: aarch64: fix scr_el3 register setup Marco Felsch
2024-04-30 11:29 ` [PATCH 2/2] ARM: i.MX8M: add support to handle ROM SError ERR050350 Marco Felsch
2024-04-30 11:48 ` Marco Felsch
2024-05-03 7:20 ` Sascha Hauer
2024-05-06 7:58 ` Marco Felsch [this message]
2024-04-30 21:10 ` [PATCH 1/2] ARM: aarch64: fix scr_el3 register setup Marco Felsch
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