[PATCH master 2/2] RISC-V: start: align uncompressed DTB size to 4 bytes

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

On ARM, I ran into a KASAN splat, because the uncompressed DT may not
have a 4-byte aligned size. This can affect RISC-V boards too, so import
the fix done there.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/boot/start.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/start.c b/arch/riscv/boot/start.c
index 92991d0f6a84..d20526293bac 100644
--- a/arch/riscv/boot/start.c
+++ b/arch/riscv/boot/start.c
@@ -54,7 +54,7 @@ void *barebox_riscv_boot_dtb(void)
 
 	pr_debug("%s: using compressed_dtb\n", __func__);
 
-	dtb = malloc(compressed_dtb->datalen_uncompressed);
+	dtb = malloc(ALIGN(compressed_dtb->datalen_uncompressed, 4));
 	if (!dtb)
 		return NULL;
 
-- 
2.39.2