From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Subject: [PATCH 01/14] ARM: arria10: system-manager: add handoff registers
Date: Mon, 17 Jun 2024 13:36:23 +0200 [thread overview]
Message-ID: <20240617-v2024-05-0-topic-socfpga-arria10-xloader-v1-1-48a6eba4bb5e@pengutronix.de> (raw)
In-Reply-To: <20240617-v2024-05-0-topic-socfpga-arria10-xloader-v1-0-48a6eba4bb5e@pengutronix.de>
The isw handoff registers are free to use for the bootloader. Add their
offsets for lowlevel debugging purposes.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
include/mach/socfpga/arria10-system-manager.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/mach/socfpga/arria10-system-manager.h b/include/mach/socfpga/arria10-system-manager.h
index f92025ae32..536baf6bc3 100644
--- a/include/mach/socfpga/arria10-system-manager.h
+++ b/include/mach/socfpga/arria10-system-manager.h
@@ -53,6 +53,15 @@
#define ARRIA10_SYSMGR_FPGA2SOC_CTRL (ARRIA10_SYSMGR_ADDR + 0xd8)
#define ARRIA10_SYSMGR_ROM_INITSWLASTLD (ARRIA10_SYSMGR_ADDR + 0x10)
+#define ARRIA10_SYSMGR_ROM_ISW0 (ARRIA10_SYSMGR_ADDR + 0x230)
+#define ARRIA10_SYSMGR_ROM_ISW1 (ARRIA10_SYSMGR_ADDR + 0x234)
+#define ARRIA10_SYSMGR_ROM_ISW2 (ARRIA10_SYSMGR_ADDR + 0x238)
+#define ARRIA10_SYSMGR_ROM_ISW3 (ARRIA10_SYSMGR_ADDR + 0x23c)
+#define ARRIA10_SYSMGR_ROM_ISW4 (ARRIA10_SYSMGR_ADDR + 0x240)
+#define ARRIA10_SYSMGR_ROM_ISW5 (ARRIA10_SYSMGR_ADDR + 0x244)
+#define ARRIA10_SYSMGR_ROM_ISW6 (ARRIA10_SYSMGR_ADDR + 0x248)
+#define ARRIA10_SYSMGR_ROM_ISW7 (ARRIA10_SYSMGR_ADDR + 0x24c)
+
#define ARRIA10_SYSMGR_BOOTINFO_BSEL_MASK 0x00007000
--
2.43.2
next prev parent reply other threads:[~2024-06-17 11:37 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-17 11:36 [PATCH 00/14] ARM: SoCFPGA: arria10: clean up early bitstream loading Steffen Trumtrar
2024-06-17 11:36 ` Steffen Trumtrar [this message]
2024-06-17 11:36 ` [PATCH 02/14] ARM: Arria10: reset manager: document reset source Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 03/14] ARM: socfpga: Arria10: PE1: remove arm_cpu_lowlevel_init Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 04/14] ARM: arria10: reset-manager: don't touch l4 wdog Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 05/14] ARM: Arria10: PE1: disable l4wd0 in bringup Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 06/14] ARM: Arria10: xload: rework __arria10_load_fpga Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 07/14] ARM: arria10: xload: fix __arria10_load_fpga Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 08/14] ARM: Arria10: xload: kick watchdog Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 09/14] ARM: arria10: mark image in OCRAM as valid Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 10/14] ARM: Arria10: arria10_finish_io: remove unused param Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 11/14] ARM: Arria10: xload: remove useless writel Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 12/14] ARM: Arria10: xload: refactor wait loops Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 13/14] ARM: Arria10: xload: reduce timeout on condone Steffen Trumtrar
2024-06-17 11:36 ` [PATCH 14/14] ARM: arria10-xload: rework broken bitstream handling Steffen Trumtrar
2024-06-18 6:48 ` [PATCH 00/14] ARM: SoCFPGA: arria10: clean up early bitstream loading Sascha Hauer
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