From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 4/7] pinctrl: rockchip: add support for configuring schmitt trigger
Date: Mon, 1 Jul 2024 09:32:17 +0200 [thread overview]
Message-ID: <20240701073220.165946-5-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20240701073220.165946-1-a.fatoum@pengutronix.de>
We had code to calculate the register layout for setting schmitt
triggers on pins, but it was not actually used.
Fix this and start parsing the input-schmitt-enable/disable properties.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/pinctrl/pinctrl-rockchip.c | 40 ++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 4276c578a6cc..4177071f26ff 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2358,6 +2358,42 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
return ctrl;
}
+static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
+ int pin_num, int enable)
+{
+ struct rockchip_pinctrl *info = bank->drvdata;
+ struct rockchip_pin_ctrl *ctrl = info->ctrl;
+ struct device *dev = info->dev;
+ struct regmap *regmap;
+ int reg, ret;
+ u8 bit;
+ u32 data, rmask;
+
+ if (!info->ctrl->schmitt_calc_reg)
+ return -ENOTSUPP;
+
+ dev_dbg(dev, "setting input schmitt of GPIO%d-%d to %d\n",
+ bank->bank_num, pin_num, enable);
+
+ ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit);
+ if (ret)
+ return ret;
+
+ /* enable the write to the equivalent lower bits */
+ switch (ctrl->type) {
+ case RK3568:
+ data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16);
+ rmask = data | (data >> 16);
+ data |= ((enable ? 0x2 : 0x1) << bit);
+ break;
+ default:
+ data = BIT(bit + 16) | (enable << bit);
+ rmask = BIT(bit + 16) | BIT(bit);
+ break;
+ }
+
+ return regmap_update_bits(regmap, reg, rmask, data);
+}
static int rockchip_pinctrl_set_state(struct pinctrl_device *pdev,
struct device_node *np)
{
@@ -2400,6 +2436,10 @@ static int rockchip_pinctrl_set_state(struct pinctrl_device *pdev,
ret = of_property_read_u32(np_config, "drive-strength", &drive_strength);
if (!ret)
rockchip_set_drive_perpin(bank, pin_num, drive_strength);
+ if (of_property_read_bool(np_config, "input-schmitt-enable"))
+ rockchip_set_schmitt(bank, pin_num, true);
+ if (of_property_read_bool(np_config, "input-schmitt-disable"))
+ rockchip_set_schmitt(bank, pin_num, false);
}
return 0;
--
2.39.2
next prev parent reply other threads:[~2024-07-01 7:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-01 7:32 [PATCH 0/7] pinctrl: rockchip: support &pcfg_input/output Ahmad Fatoum
2024-07-01 7:32 ` [PATCH 1/7] pinctrl: import <linux/pinctrl/pinconf-generic.h> header Ahmad Fatoum
2024-07-01 7:32 ` [PATCH 2/7] pinctrl: rockchip: make use of pinconf-generic.h Ahmad Fatoum
2024-07-01 7:32 ` [PATCH 3/7] pinctrl: rockchip: use of_property_read_bool() Ahmad Fatoum
2024-07-01 7:32 ` Ahmad Fatoum [this message]
2024-07-01 7:32 ` [PATCH 5/7] pinctrl: rockchip: add support for bias-pull-pin-default Ahmad Fatoum
2024-07-01 7:32 ` [PATCH 6/7] gpiolib: implement of_gpio_get_chip_by_alias Ahmad Fatoum
2024-07-01 7:32 ` [PATCH 7/7] pinctrl: rockchip: add support for configuring GPIO direction Ahmad Fatoum
2024-07-01 9:45 ` [PATCH 0/7] pinctrl: rockchip: support &pcfg_input/output Sascha Hauer
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