[PATCH 0/7] pinctrl: rockchip: support &pcfg_input/output

[PATCH 0/7] pinctrl: rockchip: support &pcfg_input/output

[Ahmad Fatoum]

The Rockchip pinctrl binding can not only mux pins as GPIOs and
configure the bias, but also configure the direction and whether it's
high/low for outputs and schmitt trigger for inputs.

This is used in some device trees to enable peripherals as a finer
grained gpio-hog.

This series adds that support into barebox. It expects deep probe to be
enabled for the board, otherwise a warning is printed when the GPIO
device wasn't available at pinctrl state selection time.

Ahmad Fatoum (7):
  pinctrl: import <linux/pinctrl/pinconf-generic.h> header
  pinctrl: rockchip: make use of pinconf-generic.h
  pinctrl: rockchip: use of_property_read_bool()
  pinctrl: rockchip: add support for configuring schmitt trigger
  pinctrl: rockchip: add support for bias-pull-pin-default
  gpiolib: implement of_gpio_get_chip_by_alias
  pinctrl: rockchip: add support for configuring GPIO direction

 drivers/gpio/gpiolib.c                  |  19 +++
 drivers/pinctrl/pinctrl-rockchip.c      | 140 +++++++++++++++----
 include/gpio.h                          |   6 +
 include/linux/pinctrl/pinconf-generic.h | 170 ++++++++++++++++++++++++
 4 files changed, 308 insertions(+), 27 deletions(-)
 create mode 100644 include/linux/pinctrl/pinconf-generic.h

-- 
2.39.2

[PATCH 1/7] pinctrl: import <linux/pinctrl/pinconf-generic.h> header

[Ahmad Fatoum]

The header is an integral part of the Linux pinctrl support, because
pinctrl drivers parse the device tree into the packed format described
by it and receive the same format later when a pinctrl state needs to be
selected.

We don't follow this same procedure in barebox and instead parse pinctrl
entries on demand, but nevertheless, drivers may use these definitions for
their own purposes internally, so let's import the header sans external
definitions.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 include/linux/pinctrl/pinconf-generic.h | 170 ++++++++++++++++++++++++
 1 file changed, 170 insertions(+)
 create mode 100644 include/linux/pinctrl/pinconf-generic.h

diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
new file mode 100644
index 000000000000..9214258ffac4
--- /dev/null
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -0,0 +1,170 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Interface the generic pinconfig portions of the pinctrl subsystem
+ *
+ * Copyright (C) 2011 ST-Ericsson SA
+ * Written on behalf of Linaro for ST-Ericsson
+ * This interface is used in the core to keep track of pins.
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ */
+#ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H
+#define __LINUX_PINCTRL_PINCONF_GENERIC_H
+
+#include <linux/types.h>
+
+/**
+ * enum pin_config_param - possible pin configuration parameters
+ * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
+ *	weakly drives the last value on a tristate bus, also known as a "bus
+ *	holder", "bus keeper" or "repeater". This allows another device on the
+ *	bus to change the value by driving the bus high or low and switching to
+ *	tristate. The argument is ignored.
+ * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
+ *	transition from say pull-up to pull-down implies that you disable
+ *	pull-up in the process, this setting disables all biasing.
+ * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
+ *	mode, also know as "third-state" (tristate) or "high-Z" or "floating".
+ *	On output pins this effectively disconnects the pin, which is useful
+ *	if for example some other pin is going to drive the signal connected
+ *	to it for a while. Pins used for input are usually always high
+ *	impedance.
+ * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
+ *	impedance to GROUND). If the argument is != 0 pull-down is enabled,
+ *	the value is interpreted by the driver and can be custom or an SI unit
+ *  	such as Ohms.
+ * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
+ *	on embedded knowledge of the controller hardware, like current mux
+ *	function. The pull direction and possibly strength too will normally
+ *	be decided completely inside the hardware block and not be readable
+ *	from the kernel side.
+ *	If the argument is != 0 pull up/down is enabled, if it is 0, the
+ *	configuration is ignored. The proper way to disable it is to use
+ *	@PIN_CONFIG_BIAS_DISABLE.
+ * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
+ *	impedance to VDD). If the argument is != 0 pull-up is enabled,
+ *	the value is interpreted by the driver and can be custom or an SI unit
+ *	such as Ohms.
+ * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
+ *	collector) which means it is usually wired with other output ports
+ *	which are then pulled up with an external resistor. Setting this
+ *	config will enable open drain mode, the argument is ignored.
+ * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
+ *	(open emitter). Setting this config will enable open source mode, the
+ *	argument is ignored.
+ * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
+ *	low, this is the most typical case and is typically achieved with two
+ *	active transistors on the output. Setting this config will enable
+ *	push-pull mode, the argument is ignored.
+ * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current
+ *	passed as argument. The argument is in mA.
+ * @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the current
+ *	passed as argument. The argument is in uA.
+ * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
+ *	which means it will wait for signals to settle when reading inputs. The
+ *	argument gives the debounce time in usecs. Setting the
+ *	argument to zero turns debouncing off.
+ * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input.  Note that this does not
+ *	affect the pin's ability to drive output.  1 enables input, 0 disables
+ *	input.
+ * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
+ *	schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
+ *	the threshold value is given on a custom format as argument when
+ *	setting pins to this mode.
+ * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
+ *      If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
+ *      schmitt-trigger mode is disabled.
+ * @PIN_CONFIG_MODE_LOW_POWER: this will configure the pin for low power
+ *	operation, if several modes of operation are supported these can be
+ *	passed in the argument on a custom form, else just use argument 1
+ *	to indicate low power mode, argument 0 turns low power mode off.
+ * @PIN_CONFIG_MODE_PWM: this will configure the pin for PWM
+ * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a
+ * 	value on the line. Use argument 1 to indicate high level, argument 0 to
+ *	indicate low level. (Please see Documentation/driver-api/pin-control.rst,
+ *	section "GPIO mode pitfalls" for a discussion around this parameter.)
+ * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode
+ * 	without driving a value there. For most platforms this reduces to
+ * 	enable the output buffers and then let the pin controller current
+ * 	configuration (eg. the currently selected mux function) drive values on
+ * 	the line. Use argument 1 to enable output mode, argument 0 to disable
+ * 	it.
+ * @PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS: this will configure the output impedance
+ * 	of the pin with the value passed as argument. The argument is in ohms.
+ * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset
+ * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
+ *	supplies, the argument to this parameter (on a custom format) tells
+ *	the driver which alternative power source to use.
+ * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs)
+ *	or latch delay (on outputs) this parameter (in a custom format)
+ *	specifies the clock skew or latch delay. It typically controls how
+ *	many double inverters are put in front of the line.
+ * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
+ * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
+ *	this parameter (on a custom format) tells the driver which alternative
+ *	slew rate to use.
+ * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
+ *	you need to pass in custom configurations to the pin controller, use
+ *	PIN_CONFIG_END+1 as the base offset.
+ * @PIN_CONFIG_MAX: this is the maximum configuration value that can be
+ *	presented using the packed format.
+ */
+enum pin_config_param {
+	PIN_CONFIG_BIAS_BUS_HOLD,
+	PIN_CONFIG_BIAS_DISABLE,
+	PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
+	PIN_CONFIG_BIAS_PULL_DOWN,
+	PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
+	PIN_CONFIG_BIAS_PULL_UP,
+	PIN_CONFIG_DRIVE_OPEN_DRAIN,
+	PIN_CONFIG_DRIVE_OPEN_SOURCE,
+	PIN_CONFIG_DRIVE_PUSH_PULL,
+	PIN_CONFIG_DRIVE_STRENGTH,
+	PIN_CONFIG_DRIVE_STRENGTH_UA,
+	PIN_CONFIG_INPUT_DEBOUNCE,
+	PIN_CONFIG_INPUT_ENABLE,
+	PIN_CONFIG_INPUT_SCHMITT,
+	PIN_CONFIG_INPUT_SCHMITT_ENABLE,
+	PIN_CONFIG_MODE_LOW_POWER,
+	PIN_CONFIG_MODE_PWM,
+	PIN_CONFIG_OUTPUT,
+	PIN_CONFIG_OUTPUT_ENABLE,
+	PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS,
+	PIN_CONFIG_PERSIST_STATE,
+	PIN_CONFIG_POWER_SOURCE,
+	PIN_CONFIG_SKEW_DELAY,
+	PIN_CONFIG_SLEEP_HARDWARE_STATE,
+	PIN_CONFIG_SLEW_RATE,
+	PIN_CONFIG_END = 0x7F,
+	PIN_CONFIG_MAX = 0xFF,
+};
+
+/*
+ * Helpful configuration macro to be used in tables etc.
+ */
+#define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL))
+
+/*
+ * The following inlines stuffs a configuration parameter and data value
+ * into and out of an unsigned long argument, as used by the generic pin config
+ * system. We put the parameter in the lower 8 bits and the argument in the
+ * upper 24 bits.
+ */
+
+static inline enum pin_config_param pinconf_to_config_param(unsigned long config)
+{
+	return (enum pin_config_param) (config & 0xffUL);
+}
+
+static inline u32 pinconf_to_config_argument(unsigned long config)
+{
+	return (u32) ((config >> 8) & 0xffffffUL);
+}
+
+static inline unsigned long pinconf_to_config_packed(enum pin_config_param param,
+						     u32 argument)
+{
+	return PIN_CONF_PACKED(param, argument);
+}
+
+#endif
-- 
2.39.2

[PATCH 2/7] pinctrl: rockchip: make use of pinconf-generic.h

[Ahmad Fatoum]

So far we defined our own enum to record what bias was indicated by the
device tree properties. Now that we have imported the upstream enum
definition, make use of it to make syncs with Linux easier.

While at it, we replace one usage of RK_BIAS_PULL_UP with `1'. That they
were equal before was a coincidence and now that we use the Linux
definitions, this is no longer the case.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/pinctrl/pinctrl-rockchip.c | 38 +++++++++++++-----------------
 1 file changed, 16 insertions(+), 22 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index ca9939c9e91d..d80ac7d5dc04 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -20,6 +20,7 @@
 #include <of.h>
 #include <of_address.h>
 #include <pinctrl.h>
+#include <linux/pinctrl/pinconf-generic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 
 #include <linux/basic_mmio_gpio.h>
@@ -222,30 +223,23 @@
 #define RK3588_PIN_BANK_FLAGS(ID, PIN, LABEL, M, P)			\
 	PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(ID, PIN, LABEL, M, M, M, M, P, P, P, P)
 
-enum {
-	RK_BIAS_DISABLE = 0,
-	RK_BIAS_PULL_UP,
-	RK_BIAS_PULL_DOWN,
-	RK_BIAS_BUS_HOLD,
-};
-
 static struct rockchip_pinctrl *to_rockchip_pinctrl(struct pinctrl_device *pdev)
 {
 	return container_of(pdev, struct rockchip_pinctrl, pctl_dev);
 }
 
-static int parse_bias_config(struct device_node *np)
+static enum pin_config_param parse_bias_config(struct device_node *np)
 {
 	u32 val;
  
 	if (of_property_read_u32(np, "bias-pull-up", &val) != -EINVAL)
-		return RK_BIAS_PULL_UP;
+		return PIN_CONFIG_BIAS_PULL_UP;
 	else if (of_property_read_u32(np, "bias-pull-down", &val) != -EINVAL)
-		return RK_BIAS_PULL_DOWN;
+		return PIN_CONFIG_BIAS_PULL_DOWN;
 	else if (of_property_read_u32(np, "bias-bus-hold", &val) != -EINVAL)
-		return RK_BIAS_BUS_HOLD;
+		return PIN_CONFIG_BIAS_BUS_HOLD;
 	else
-		return RK_BIAS_DISABLE;
+		return PIN_CONFIG_BIAS_DISABLE;
 }
 
 static struct rockchip_pin_bank *bank_num_to_bank(
@@ -2104,16 +2098,16 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 
 static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
 	{
-		RK_BIAS_DISABLE,
-		RK_BIAS_PULL_UP,
-		RK_BIAS_PULL_DOWN,
-		RK_BIAS_BUS_HOLD
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_BUS_HOLD
 	},
 	{
-		RK_BIAS_DISABLE,
-		RK_BIAS_PULL_DOWN,
-		RK_BIAS_DISABLE,
-		RK_BIAS_PULL_UP
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP
 	},
 };
 
@@ -2142,7 +2136,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RK2928:
 	case RK3128:
 		data = BIT(bit + 16);
-		if (pull == RK_BIAS_DISABLE)
+		if (pull == PIN_CONFIG_BIAS_DISABLE)
 			data |= BIT(bit);
 		ret = regmap_write(regmap, reg, data);
 		break;
@@ -2169,7 +2163,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 		 * where that pull up value becomes 3.
 		 */
 		if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
-			if (ret == RK_BIAS_PULL_UP)
+			if (ret == 1)
 				ret = 3;
 		}
 
-- 
2.39.2

[PATCH 3/7] pinctrl: rockchip: use of_property_read_bool()

[Ahmad Fatoum]

No Rockchip device tree actually sets a value for these properties and
neither kernel or barebox driver cares about the property value.

Thus replace of_property_read_u32 with of_property_read_bool for
simplification.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/pinctrl/pinctrl-rockchip.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index d80ac7d5dc04..4276c578a6cc 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -230,13 +230,11 @@ static struct rockchip_pinctrl *to_rockchip_pinctrl(struct pinctrl_device *pdev)
 
 static enum pin_config_param parse_bias_config(struct device_node *np)
 {
-	u32 val;
- 
-	if (of_property_read_u32(np, "bias-pull-up", &val) != -EINVAL)
+	if (of_property_read_bool(np, "bias-pull-up"))
 		return PIN_CONFIG_BIAS_PULL_UP;
-	else if (of_property_read_u32(np, "bias-pull-down", &val) != -EINVAL)
+	else if (of_property_read_bool(np, "bias-pull-down"))
 		return PIN_CONFIG_BIAS_PULL_DOWN;
-	else if (of_property_read_u32(np, "bias-bus-hold", &val) != -EINVAL)
+	else if (of_property_read_bool(np, "bias-bus-hold"))
 		return PIN_CONFIG_BIAS_BUS_HOLD;
 	else
 		return PIN_CONFIG_BIAS_DISABLE;
-- 
2.39.2

[PATCH 4/7] pinctrl: rockchip: add support for configuring schmitt trigger

[Ahmad Fatoum]

We had code to calculate the register layout for setting schmitt
triggers on pins, but it was not actually used.

Fix this and start parsing the input-schmitt-enable/disable properties.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/pinctrl/pinctrl-rockchip.c | 40 ++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 4276c578a6cc..4177071f26ff 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2358,6 +2358,42 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
 	return ctrl;
 }
 
+static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
+				int pin_num, int enable)
+{
+	struct rockchip_pinctrl *info = bank->drvdata;
+	struct rockchip_pin_ctrl *ctrl = info->ctrl;
+	struct device *dev = info->dev;
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data, rmask;
+
+	if (!info->ctrl->schmitt_calc_reg)
+		return -ENOTSUPP;
+
+	dev_dbg(dev, "setting input schmitt of GPIO%d-%d to %d\n",
+		bank->bank_num, pin_num, enable);
+
+	ret = ctrl->schmitt_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	if (ret)
+		return ret;
+
+	/* enable the write to the equivalent lower bits */
+	switch (ctrl->type) {
+	case RK3568:
+		data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16);
+		rmask = data | (data >> 16);
+		data |= ((enable ? 0x2 : 0x1) << bit);
+		break;
+	default:
+		data = BIT(bit + 16) | (enable << bit);
+		rmask = BIT(bit + 16) | BIT(bit);
+		break;
+	}
+
+	return regmap_update_bits(regmap, reg, rmask, data);
+}
 static int rockchip_pinctrl_set_state(struct pinctrl_device *pdev,
 				      struct device_node *np)
 {
@@ -2400,6 +2436,10 @@ static int rockchip_pinctrl_set_state(struct pinctrl_device *pdev,
 		ret = of_property_read_u32(np_config, "drive-strength", &drive_strength);
 		if (!ret)
 			rockchip_set_drive_perpin(bank, pin_num, drive_strength);
+		if (of_property_read_bool(np_config, "input-schmitt-enable"))
+			rockchip_set_schmitt(bank, pin_num, true);
+		if (of_property_read_bool(np_config, "input-schmitt-disable"))
+			rockchip_set_schmitt(bank, pin_num, false);
 	}
 
 	return 0;
-- 
2.39.2

[PATCH 5/7] pinctrl: rockchip: add support for bias-pull-pin-default

[Ahmad Fatoum]

The older rk3128, rk3036 and rk3066a SoCs only supported a
pin-function-specific default bias as well as disabling bias with no way
to manually choose whether the bias should be a pull-up or a pull-down.

We wrongly treated this as if there is no bias, so let's fix that.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/pinctrl/pinctrl-rockchip.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 4177071f26ff..8e1e868fa78f 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -236,6 +236,8 @@ static enum pin_config_param parse_bias_config(struct device_node *np)
 		return PIN_CONFIG_BIAS_PULL_DOWN;
 	else if (of_property_read_bool(np, "bias-bus-hold"))
 		return PIN_CONFIG_BIAS_BUS_HOLD;
+	else if (of_property_read_bool(np, "bias-pull-pin-default"))
+		return PIN_CONFIG_BIAS_PULL_PIN_DEFAULT;
 	else
 		return PIN_CONFIG_BIAS_DISABLE;
 }
-- 
2.39.2

[PATCH 6/7] gpiolib: implement of_gpio_get_chip_by_alias

[Ahmad Fatoum]

Rockchip pinctrl binding can configure GPIO direction, so let's add a
function that returns a gpio_chip that can be used for this.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/gpio/gpiolib.c | 19 +++++++++++++++++++
 include/gpio.h         |  6 ++++++
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 520ffed2eefb..f34dce0e98c6 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1057,6 +1057,25 @@ struct gpio_chip *gpio_get_chip_by_dev(struct device *dev)
 	return NULL;
 }
 
+struct gpio_chip *of_gpio_get_chip_by_alias(const char *alias)
+{
+	struct gpio_chip *chip;
+	struct device_node *np;
+
+	np = of_find_node_by_alias(NULL, alias);
+	if (!np)
+		return NULL;
+
+	of_device_ensure_probed(np);
+
+	list_for_each_entry(chip, &chip_list, list) {
+		if (dev_of_node(chip->dev) == np)
+			return chip;
+	}
+
+	return NULL;
+}
+
 int gpio_get_num(struct device *dev, int gpio)
 {
 	struct gpio_chip *chip;
diff --git a/include/gpio.h b/include/gpio.h
index 71896c9d6bdb..8c3eea73d8bb 100644
--- a/include/gpio.h
+++ b/include/gpio.h
@@ -36,6 +36,7 @@ void gpio_set_active(unsigned gpio, bool state);
 int gpio_is_active(unsigned gpio);
 int gpio_direction_active(unsigned gpio, bool state);
 struct gpio_chip *gpio_get_chip_by_dev(struct device *);
+struct gpio_chip *of_gpio_get_chip_by_alias(const char *alias);
 
 /**
  * gpio_poll_timeout_us - Poll till GPIO reaches requested active state
@@ -69,6 +70,11 @@ static inline struct gpio_chip *gpio_get_chip_by_dev(struct device *dev)
 	return NULL;
 }
 
+static struct gpio_chip *of_gpio_get_chip_by_alias(const char *alias)
+{
+	return NULL;
+}
+
 #define gpio_poll_timeout_us(gpio, val, timeout_us) (-ENOSYS)
 #endif
 
-- 
2.39.2

[PATCH 7/7] pinctrl: rockchip: add support for configuring GPIO direction

[Ahmad Fatoum]

The Rockchip pinctrl binding can not only mux pins as GPIOs and
configure the bias, but also configure the direction.

This is used in some device trees to enable peripherals as a finer
grained gpio-hog.

In Linux, this is implemented by keeping a list of deferred pin configs,
but for barebox, let's just assume we can probe the GPIO controller on
demand and print a warning message otherwise.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/pinctrl/pinctrl-rockchip.c | 52 ++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 8e1e868fa78f..ddf8bfb9042b 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -242,6 +242,24 @@ static enum pin_config_param parse_bias_config(struct device_node *np)
 		return PIN_CONFIG_BIAS_DISABLE;
 }
 
+static unsigned long parse_gpio_direction(struct device_node *np)
+{
+	enum pin_config_param param = PIN_CONFIG_END;
+	u32 argument = 0;
+
+	if (of_property_read_bool(np, "input-enable")) {
+		param = PIN_CONFIG_INPUT_ENABLE;
+	} else if (of_property_read_bool(np, "output-low")) {
+		param = PIN_CONFIG_OUTPUT;
+		argument = 0;
+	} else if (of_property_read_bool(np, "output-high")) {
+		param = PIN_CONFIG_OUTPUT;
+		argument = 1;
+	}
+
+	return pinconf_to_config_packed(param, argument);
+}
+
 static struct rockchip_pin_bank *bank_num_to_bank(
 					struct rockchip_pinctrl *info,
 					unsigned num)
@@ -2396,6 +2414,39 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
 
 	return regmap_update_bits(regmap, reg, rmask, data);
 }
+
+static void rockchip_set_gpio(struct rockchip_pin_bank *bank,
+			      int pin_num, unsigned long config)
+{
+	enum pin_config_param param = pinconf_to_config_param(config);
+	struct gpio_chip *gpio;
+
+	if (param != PIN_CONFIG_OUTPUT && param != PIN_CONFIG_INPUT_ENABLE)
+		return;
+
+	gpio = of_gpio_get_chip_by_alias(bank->name);
+	if (!gpio) {
+		/* For simplicity, we don't implement rockchip_pinconf_defer_pin
+		 * like Linux and instead expect boards to be deep-probe enabled
+		 */
+		pr_warn("pinctrl config failed: GPIO controller '%s' not found\n",
+			bank->name);
+		return;
+	}
+
+	switch (param) {
+	case PIN_CONFIG_OUTPUT:
+		gpio->ops->direction_output(gpio, pin_num,
+					    pinconf_to_config_argument(config));
+		break;
+	case PIN_CONFIG_INPUT_ENABLE:
+		gpio->ops->direction_input(gpio, pin_num);
+		break;
+	default:
+		break;
+	}
+}
+
 static int rockchip_pinctrl_set_state(struct pinctrl_device *pdev,
 				      struct device_node *np)
 {
@@ -2434,6 +2485,7 @@ static int rockchip_pinctrl_set_state(struct pinctrl_device *pdev,
 		bank = bank_num_to_bank(info, bank_num);
 		rockchip_set_mux(bank, pin_num, func);
 		rockchip_set_pull(bank, pin_num, parse_bias_config(np_config));
+		rockchip_set_gpio(bank, pin_num, parse_gpio_direction(np_config));
 
 		ret = of_property_read_u32(np_config, "drive-strength", &drive_strength);
 		if (!ret)
-- 
2.39.2

Re: [PATCH 0/7] pinctrl: rockchip: support &pcfg_input/output

[Sascha Hauer]

On Mon, 01 Jul 2024 09:32:13 +0200, Ahmad Fatoum wrote:
> The Rockchip pinctrl binding can not only mux pins as GPIOs and
> configure the bias, but also configure the direction and whether it's
> high/low for outputs and schmitt trigger for inputs.
> 
> This is used in some device trees to enable peripherals as a finer
> grained gpio-hog.
> 
> [...]

Applied, thanks!

[1/7] pinctrl: import <linux/pinctrl/pinconf-generic.h> header
      https://git.pengutronix.de/cgit/barebox/commit/?id=e6187ed1a19b (link may not be stable)
[2/7] pinctrl: rockchip: make use of pinconf-generic.h
      https://git.pengutronix.de/cgit/barebox/commit/?id=eb792c5846bd (link may not be stable)
[3/7] pinctrl: rockchip: use of_property_read_bool()
      https://git.pengutronix.de/cgit/barebox/commit/?id=ba588f2f2fdf (link may not be stable)
[4/7] pinctrl: rockchip: add support for configuring schmitt trigger
      https://git.pengutronix.de/cgit/barebox/commit/?id=73b4a7b3d3c5 (link may not be stable)
[5/7] pinctrl: rockchip: add support for bias-pull-pin-default
      https://git.pengutronix.de/cgit/barebox/commit/?id=a56a87ab81ab (link may not be stable)
[6/7] gpiolib: implement of_gpio_get_chip_by_alias
      https://git.pengutronix.de/cgit/barebox/commit/?id=c57a040ac78d (link may not be stable)
[7/7] pinctrl: rockchip: add support for configuring GPIO direction
      https://git.pengutronix.de/cgit/barebox/commit/?id=af7c5c004a5d (link may not be stable)

Best regards,
-- 
Sascha Hauer <s.hauer@pengutronix.de>