From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Subject: [PATCH 09/10] clk: support init->parent_data
Date: Tue, 29 Oct 2024 09:42:39 +0100 [thread overview]
Message-ID: <20241029-v2024-10-0-topic-socfpga-agilex5-v1-9-96df2d7dadf4@pengutronix.de> (raw)
In-Reply-To: <20241029-v2024-10-0-topic-socfpga-agilex5-v1-0-96df2d7dadf4@pengutronix.de>
Linux clk driver supports matching parents via init->parent_data instead
of init->parent_names.
Add support for this feature to barebox, too.
Linux however supports setting a "name" and "fw_name" for a parent
clock. "fw_name" is a local name for the provider registering the clock
and "name" is a globally unique parent name. For the time being, only
support the globally unique "name" field.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
drivers/clk/clk.c | 48 ++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 40 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index bd368782804c9a2cce1ced7826501363c0c2ab2d..be4060e6d5a0d7ecbed729b4d96570d7980f5857 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -476,11 +476,28 @@ int bclk_register(struct clk *clk)
return ret;
}
+static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist)
+{
+ const char *dst;
+
+ if (!src) {
+ if (must_exist)
+ return -EINVAL;
+ return 0;
+ }
+
+ *dst_p = dst = xstrdup(src);
+ if (!dst)
+ return -ENOMEM;
+
+ return 0;
+}
+
struct clk *clk_register(struct device *dev, struct clk_hw *hw)
{
struct clk *clk;
const struct clk_init_data *init = hw->init;
- char **parent_names = NULL;
+ const char **parent_names = NULL;
int i, ret;
if (!hw->init)
@@ -496,14 +513,29 @@ struct clk *clk_register(struct device *dev, struct clk_hw *hw)
clk->parents = xzalloc(sizeof(struct clk *) * clk->num_parents);
- if (init->parent_names) {
+ if (init->parent_names || init->parent_data) {
parent_names = xzalloc(init->num_parents * sizeof(char *));
- for (i = 0; i < init->num_parents; i++)
- parent_names[i] = xstrdup(init->parent_names[i]);
-
- clk->parent_names = (const char *const*)parent_names;
-
+ for (i = 0; i < init->num_parents; i++) {
+ if (init->parent_names) {
+ ret = clk_cpy_name(&parent_names[i],
+ init->parent_names[i], true);
+ } else if (init->parent_data) {
+ /* Linux copies fw_name and if successful also name.
+ * As fw_name is not handled in barebox, just copy the
+ * name field and fallback to hw->clk.name if it doesn't
+ * exist.
+ */
+ ret = clk_cpy_name(&parent_names[i],
+ init->parent_data[i].name,
+ true);
+ if (ret)
+ ret = clk_cpy_name(&parent_names[i],
+ init->parent_data[i].hw->clk.name,
+ false);
+ }
+ }
+ clk->parent_names = (const char *const *)parent_names;
} else {
for (i = 0; i < init->num_parents; i++)
clk->parents[i] = clk_hw_to_clk(init->parent_hws[i]);
@@ -515,7 +547,7 @@ struct clk *clk_register(struct device *dev, struct clk_hw *hw)
if (ret) {
if (parent_names) {
for (i = 0; i < init->num_parents; i++)
- free(parent_names[i]);
+ free(&parent_names[i]);
free(parent_names);
}
free(clk->parents);
--
2.46.0
next prev parent reply other threads:[~2024-10-29 8:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 8:42 [PATCH 00/10] ARM: SoCFPGA: Add initial support for Agilex5 Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 01/10] ARM: socfpga: kconfig: sort entries Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 02/10] mach: socfpga: debug_ll: rework putc_ll Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 03/10] reset: reset-socfpga: build only for 32-bit socfpga Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 04/10] arm: socfgpa: add support for SoCFPGA Agilex5 Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 05/10] ARM: socfpga: add Arrow AXE5 Agilex5 board Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 06/10] net: add support for Designware XGMAC (10gb) ethernet Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 07/10] net: phy: add Analog Devices ADIN1300 Steffen Trumtrar
2024-10-29 8:42 ` [PATCH 08/10] linux: clk: add clk_parent_data Steffen Trumtrar
2024-10-29 8:42 ` Steffen Trumtrar [this message]
2024-10-29 8:42 ` [PATCH 10/10] clk: socfpga: add agilex5 clock support Steffen Trumtrar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241029-v2024-10-0-topic-socfpga-agilex5-v1-9-96df2d7dadf4@pengutronix.de \
--to=s.trumtrar@pengutronix.de \
--cc=barebox@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox