From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Mon, 05 May 2025 14:39:12 +0200 Received: from metis.whiteo.stw.pengutronix.de ([2a0a:edc0:2:b01:1d::104]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1uBv6G-002SXC-29 for lore@lore.pengutronix.de; Mon, 05 May 2025 14:39:12 +0200 Received: from bombadil.infradead.org ([2607:7c80:54:3::133]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1uBv6A-0006nF-Mc for lore@pengutronix.de; Mon, 05 May 2025 14:39:12 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RbZBVMg/+LAeUL5s/H64JSZKePp6LAvvue/L8ScdN18=; b=OwW+cgQM3s9MHsEqyWHdzKAX6q h9+Irut//S2NtF4zlij9PMT7WxhAPWu09iQQc/QLSf+oyVOC8oFOAk+WpND/2io7tHSBfzlJHKQ9Y zQnEqzyJljPnj4nWhrqaIWqCbJSxoP9XlYi+GdsOe7nu3Ne/HcCYVcRLKD4+80ZGTqS8RJO2Oqvt4 vFkKAY2f8eYz9J4bWGQzAEUfU46MgO6EwqZW4QGgavXqZfCi+OEsVDgjU+jirp/YFRjss8Xbf+WxL +rs0y7W25DDphSi1oIDliulzbuA4hm9b4ynGe5VKdWtrKqc81wIqiNP77DqYSqjJYMLWUw3MAvWAn DN3Bcvkw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uBv5P-00000007LdL-0eYO; Mon, 05 May 2025 12:38:19 +0000 Received: from metis.whiteo.stw.pengutronix.de ([2a0a:edc0:2:b01:1d::104]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uBv2A-00000007Kb9-0J7L for barebox@lists.infradead.org; Mon, 05 May 2025 12:35:01 +0000 Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1uBv28-0004rN-RO; Mon, 05 May 2025 14:34:56 +0200 Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1uBv28-001EQf-21; Mon, 05 May 2025 14:34:56 +0200 Received: from localhost ([::1] helo=dude05.red.stw.pengutronix.de) by dude05.red.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1uBuah-00Fb9X-2I; Mon, 05 May 2025 14:06:35 +0200 From: Ahmad Fatoum To: barebox@lists.infradead.org Cc: Ahmad Fatoum Date: Mon, 5 May 2025 14:06:30 +0200 Message-Id: <20250505120633.3717186-28-a.fatoum@pengutronix.de> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250505120633.3717186-1-a.fatoum@pengutronix.de> References: <20250505120633.3717186-1-a.fatoum@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250505_053458_115795_4B1F8154 X-CRM114-Status: GOOD ( 11.75 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.whiteo.stw.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-6.0 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 27/30] mci: imx-esdhc: set burst_length_enable X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.whiteo.stw.pengutronix.de) Linux writes this register unconditionally for all usdhc. As we didn't seem to be hurt by its lack so far, we will set it only when tuning support is enabled. Signed-off-by: Ahmad Fatoum --- drivers/mci/imx-esdhc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index eb24f49008f6..3e4408f5b0ff 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -347,6 +347,21 @@ static int esdhc_init(struct mci_host *mci, struct device *dev) (host->socdata->flags & ESDHC_FLAG_STD_TUNING)) { u32 tmp; + /* + * ROM code will change the bit burst_length_enable setting + * to zero if this usdhc is chosen to boot system. Change + * it back here, otherwise it will impact the performance a + * lot. This bit is used to enable/disable the burst length + * for the external AHB2AXI bridge. It's useful especially + * for INCR transfer because without burst length indicator, + * the AHB2AXI bridge does not know the burst length in + * advance. And without burst length indicator, AHB INCR + * transfer can only be converted to singles on the AXI side. + */ + sdhci_write32(&host->sdhci, SDHCI_HOST_CONTROL, + sdhci_read32(&host->sdhci, SDHCI_HOST_CONTROL) + | ESDHC_BURST_LEN_EN_INCR); + /* disable DLL_CTRL delay line settings */ sdhci_write32(&host->sdhci, ESDHC_DLL_CTRL, 0x0); -- 2.39.5