From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>
Subject: [PATCH 10/31] ARM: k3: add yaml files for AM62l
Date: Wed, 28 May 2025 13:45:22 +0200 [thread overview]
Message-ID: <20250528-arm-k3-am62l-v1-10-3f88e6d10d99@pengutronix.de> (raw)
In-Reply-To: <20250528-arm-k3-am62l-v1-0-3f88e6d10d99@pengutronix.de>
board-cfg-am62x.yaml can be re-used for AM62l, but we need a AM62l
specific sec-cfg-am62l.yaml. pm-cfg.yaml and rm-cfg.yaml are no longer
needed for AM62l, so create a new k3cfg file with only board-cfg.yaml
and sec-cfg.yaml.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-k3/Makefile | 7 +
arch/arm/mach-k3/sec-cfg-am62l.yaml | 379 ++++++++++++++++++++++++++++++++++++
2 files changed, 386 insertions(+)
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index b05d90da4b3ad468cdfcdcb286c004f5e9e72925..df77832887e992de934623d0a3384ab82454e2cc 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -6,6 +6,7 @@ obj-pbl-y += ddrss.o
obj-$(CONFIG_BAREBOX_UPDATE) += bbu.o
extra-$(CONFIG_MACH_K3_CORTEX_R5) += combined-dm-cfg-am62x.k3cfg combined-sysfw-cfg-am62x.k3cfg
+extra-$(CONFIG_MACH_AM62LX) += combined-sysfw-cfg-am62l.k3cfg
$(obj)/combined-dm-cfg-am62x.k3cfg: $(srctree)/arch/arm/mach-k3/schema.yaml \
$(obj)/pm-cfg-am62x.yaml \
@@ -20,3 +21,9 @@ $(obj)/combined-sysfw-cfg-am62x.k3cfg: $(srctree)/arch/arm/mach-k3/schema.yaml \
$(obj)/rm-cfg-am62x.yaml \
FORCE
$(call if_changed,k3_cfg)
+
+$(obj)/combined-sysfw-cfg-am62l.k3cfg: $(srctree)/arch/arm/mach-k3/schema.yaml \
+ $(obj)/board-cfg-am62x.yaml \
+ $(obj)/sec-cfg-am62l.yaml \
+ FORCE
+ $(call if_changed,k3_cfg)
diff --git a/arch/arm/mach-k3/sec-cfg-am62l.yaml b/arch/arm/mach-k3/sec-cfg-am62l.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..bea6891eda249e236b2057cc1e6758de2c47016d
--- /dev/null
+++ b/arch/arm/mach-k3/sec-cfg-am62l.yaml
@@ -0,0 +1,379 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for AM62Lx
+#
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+
+ proc_acl_entries:
+ - # 1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - # 1
+ host_id: 0
+ supervisor_host_id: 0
+ - # 2
+ host_id: 0
+ supervisor_host_id: 0
+ - # 3
+ host_id: 0
+ supervisor_host_id: 0
+ - # 4
+ host_id: 0
+ supervisor_host_id: 0
+ - # 5
+ host_id: 0
+ supervisor_host_id: 0
+ - # 6
+ host_id: 0
+ supervisor_host_id: 0
+ - # 7
+ host_id: 0
+ supervisor_host_id: 0
+ - # 8
+ host_id: 0
+ supervisor_host_id: 0
+ - # 9
+ host_id: 0
+ supervisor_host_id: 0
+ - # 10
+ host_id: 0
+ supervisor_host_id: 0
+ - # 11
+ host_id: 0
+ supervisor_host_id: 0
+ - # 12
+ host_id: 0
+ supervisor_host_id: 0
+ - # 13
+ host_id: 0
+ supervisor_host_id: 0
+ - # 14
+ host_id: 0
+ supervisor_host_id: 0
+ - # 15
+ host_id: 0
+ supervisor_host_id: 0
+ - # 16
+ host_id: 0
+ supervisor_host_id: 0
+ - # 17
+ host_id: 0
+ supervisor_host_id: 0
+ - # 18
+ host_id: 0
+ supervisor_host_id: 0
+ - # 19
+ host_id: 0
+ supervisor_host_id: 0
+ - # 20
+ host_id: 0
+ supervisor_host_id: 0
+ - # 21
+ host_id: 0
+ supervisor_host_id: 0
+ - # 22
+ host_id: 0
+ supervisor_host_id: 0
+ - # 23
+ host_id: 0
+ supervisor_host_id: 0
+ - # 24
+ host_id: 0
+ supervisor_host_id: 0
+ - # 25
+ host_id: 0
+ supervisor_host_id: 0
+ - # 26
+ host_id: 0
+ supervisor_host_id: 0
+ - # 27
+ host_id: 0
+ supervisor_host_id: 0
+ - # 28
+ host_id: 0
+ supervisor_host_id: 0
+ - # 29
+ host_id: 0
+ supervisor_host_id: 0
+ - # 30
+ host_id: 0
+ supervisor_host_id: 0
+ - # 31
+ host_id: 0
+ supervisor_host_id: 0
+ - # 32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ otp_entry:
+ - # 1
+ host_id: 0
+ host_perms: 0
+ - # 2
+ host_id: 0
+ host_perms: 0
+ - # 3
+ host_id: 0
+ host_perms: 0
+ - # 4
+ host_id: 0
+ host_perms: 0
+ - # 5
+ host_id: 0
+ host_perms: 0
+ - # 6
+ host_id: 0
+ host_perms: 0
+ - # 7
+ host_id: 0
+ host_perms: 0
+ - # 8
+ host_id: 0
+ host_perms: 0
+ - # 9
+ host_id: 0
+ host_perms: 0
+ - # 10
+ host_id: 0
+ host_perms: 0
+ - # 11
+ host_id: 0
+ host_perms: 0
+ - # 12
+ host_id: 0
+ host_perms: 0
+ - # 13
+ host_id: 0
+ host_perms: 0
+ - # 14
+ host_id: 0
+ host_perms: 0
+ - # 15
+ host_id: 0
+ host_perms: 0
+ - # 16
+ host_id: 0
+ host_perms: 0
+ - # 17
+ host_id: 0
+ host_perms: 0
+ - # 18
+ host_id: 0
+ host_perms: 0
+ - # 19
+ host_id: 0
+ host_perms: 0
+ - # 20
+ host_id: 0
+ host_perms: 0
+ - # 21
+ host_id: 0
+ host_perms: 0
+ - # 22
+ host_id: 0
+ host_perms: 0
+ - # 23
+ host_id: 0
+ host_perms: 0
+ - # 24
+ host_id: 0
+ host_perms: 0
+ - # 25
+ host_id: 0
+ host_perms: 0
+ - # 26
+ host_id: 0
+ host_perms: 0
+ - # 27
+ host_id: 0
+ host_perms: 0
+ - # 28
+ host_id: 0
+ host_perms: 0
+ - # 29
+ host_id: 0
+ host_perms: 0
+ - # 30
+ host_id: 0
+ host_perms: 0
+ - # 31
+ host_id: 0
+ host_perms: 0
+ - # 32
+ host_id: 0
+ host_perms: 0
+ write_host_id: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x0
+ size: 0
+ auth_resource_owner: 0
+ enable_saul_psil_global_config_writes: 0x0
+ rsvd: [0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x0
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]
--
2.39.5
next prev parent reply other threads:[~2025-05-28 12:04 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-28 11:45 [PATCH 00/31] ARM: K3: add support for AM62L Sascha Hauer
2025-05-28 11:45 ` [PATCH 01/31] scripts: k3img: remove duplicate case value Sascha Hauer
2025-05-28 11:45 ` [PATCH 02/31] ARM: K3: prepare support for other SoCs Sascha Hauer
2025-05-28 11:45 ` [PATCH 03/31] ARM: k3: make k3img destination addresses configurable Sascha Hauer
2025-05-28 11:45 ` [PATCH 04/31] ARM: dts: add k3-am62l dts(i) files Sascha Hauer
2025-05-28 11:45 ` [PATCH 05/31] ARM: dts: am62l: Fix assigned-clock-parents Sascha Hauer
2025-05-28 11:45 ` [PATCH 06/31] ARM: K3: add am62lx base support Sascha Hauer
2025-05-28 11:45 ` [PATCH 07/31] ARM: Makefile: descend into mach-* for cleaning Sascha Hauer
2025-05-28 11:45 ` [PATCH 08/31] ARM: k3: rename yaml files from am625 to am62x Sascha Hauer
2025-05-28 11:45 ` [PATCH 09/31] scripts/ti-board-config.py: fix length Sascha Hauer
2025-05-28 11:45 ` Sascha Hauer [this message]
2025-05-28 11:45 ` [PATCH 11/31] k3: ringacc: pass ringrt address in struct k3_ringacc_init_data Sascha Hauer
2025-05-28 11:45 ` [PATCH 12/31] drivers: soc: ti: k3-ringacc: handle absence of tisci Sascha Hauer
2025-05-28 11:45 ` [PATCH 13/31] drivers: soc: ti: k3-ringacc: fix k3_ringacc_ring_reset_sci Sascha Hauer
2025-05-28 11:45 ` [PATCH 14/31] dma: ti: k3-psil: Add PSIL data for AM62L Sascha Hauer
2025-05-28 11:45 ` [PATCH 15/31] dma: ti: k3-udma: Refactor common bits for AM62L support Sascha Hauer
2025-05-28 11:45 ` [PATCH 16/31] dma: ti: k3-udma-common: Update common code for AM62L DMAs Sascha Hauer
2025-05-28 11:45 ` [PATCH 17/31] dma: ti: k3-udma-am62l: Add AM62L support DMA drivers Sascha Hauer
2025-05-28 11:45 ` [PATCH 18/31] ARM: dts: am62l: Add ethernet ports Sascha Hauer
2025-05-28 11:45 ` [PATCH 19/31] ARM: dts: am62l evm: " Sascha Hauer
2025-05-28 11:45 ` [PATCH 20/31] ARM: k3: am62l: add barebox specific am62l.dtsi Sascha Hauer
2025-05-28 11:45 ` [PATCH 21/31] net: davinci_mdio: Use fallback clock rate Sascha Hauer
2025-05-28 11:45 ` [PATCH 22/31] firmware: arm_scmi: Add support for clock parents Sascha Hauer
2025-05-28 11:45 ` [PATCH 23/31] clk: add struct clk_parent_data Sascha Hauer
2025-05-28 11:45 ` [PATCH 24/31] clk: arm_scmi: implement clock parent setting Sascha Hauer
2025-05-28 11:45 ` [PATCH 25/31] ARM: dts: am62l3-evm: add MMC aliases Sascha Hauer
2025-05-28 11:45 ` [PATCH 26/31] dma: ti: k3-udma: limit asel to am625 Sascha Hauer
2025-05-28 11:45 ` [PATCH 27/31] gpio: increase ARCH_NR_GPIOS to 512 Sascha Hauer
2025-05-28 11:45 ` [PATCH 28/31] ARM: dts: k3-am62l: reserve memory for TF-A Sascha Hauer
2025-05-28 11:45 ` [PATCH 29/31] scripts: k3img: make dmdata optional Sascha Hauer
2025-05-28 11:45 ` [PATCH 30/31] scripts: k3img: handle bootcore_opts Sascha Hauer
2025-05-28 11:45 ` [PATCH 31/31] ARM: k3: add AM62l3 EVM board support Sascha Hauer
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