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Wed, 28 May 2025 14:01:59 +0200 Received: from localhost ([::1] helo=dude02.red.stw.pengutronix.de) by dude02.red.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1uKFE2-00CB0R-1u; Wed, 28 May 2025 13:45:38 +0200 From: Sascha Hauer Date: Wed, 28 May 2025 13:45:39 +0200 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250528-arm-k3-am62l-v1-27-3f88e6d10d99@pengutronix.de> References: <20250528-arm-k3-am62l-v1-0-3f88e6d10d99@pengutronix.de> In-Reply-To: <20250528-arm-k3-am62l-v1-0-3f88e6d10d99@pengutronix.de> To: BAREBOX X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748432738; l=850; i=s.hauer@pengutronix.de; s=20230412; h=from:subject:message-id; bh=FIOMw02/ikgNm1fAj8kSIcGsU0Ln0HcKur9RKQV5q18=; b=BcMYOD8CLWjdJXCaLOX8MEUqwwIeJ4m1/GevvJB20SxE6/yYlSpzU7sXdMU3mtRNNfb+8uim5 DpIh1L1+S4zCfEdwKRaZmBrggsj0tjp6ztIsXOtIdcAsqI0GyAj7kQL X-Developer-Key: i=s.hauer@pengutronix.de; a=ed25519; pk=4kuc9ocmECiBJKWxYgqyhtZOHj5AWi7+d0n/UjhkwTg= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250528_130210_317911_D4072C15 X-CRM114-Status: GOOD ( 10.57 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.whiteo.stw.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-6.7 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 27/31] gpio: increase ARCH_NR_GPIOS to 512 X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.whiteo.stw.pengutronix.de) The TI AM62l EVM board has 259 GPIOs which is more than the current maximum of 256. We could increase it locally for the K3 arch, but others are likely to follow, so increase it globally. Signed-off-by: Sascha Hauer --- include/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/gpio.h b/include/gpio.h index beda10efde0815aa89a8b064b4c9d515c16ae97d..92fd27b2b996eed8777e9321b4f34e245ceca480 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -84,7 +84,7 @@ static inline struct gpio_chip *of_gpio_get_chip_by_alias(const char *alias) #if defined(CONFIG_ARCH_NR_GPIO) && CONFIG_ARCH_NR_GPIO > 0 #define ARCH_NR_GPIOS CONFIG_ARCH_NR_GPIO #else -#define ARCH_NR_GPIOS 256 +#define ARCH_NR_GPIOS 512 #endif static inline int gpio_is_valid(int gpio) -- 2.39.5