[PATCH v2 05/33] ARM: dts: am62l: Fix assigned-clock-parents

[Sascha Hauer <s.hauer@pengutronix.de>]

The AM62l device trees we imported to barebox have problems with the
clock parents which is described in [1] and [2].

There is no way the Kernel or barebox SCMI clk drivers can work with the
current way the clk parents are specified in the downstream TF-A. This
problem is acknowledged by TI and will hopefully be fixed.

This patch fixes the clk parents the way that I hope TI will do it as
well. Currently this only works with a patched downstream TF-A.

[1] https://lore.kernel.org/all/aCcSG5ah12N0yOwi@pengutronix.de/
[2] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/34834/1/plat/ti/k3/common/drivers/scmi/scmi_clock.c#165

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/dts/k3-am62l-main.dtsi | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/dts/k3-am62l-main.dtsi b/arch/arm/dts/k3-am62l-main.dtsi
index f6fbaaede8c36ac0aab92bef7763202bb0ab30dc..d161df3215c35a2d3de67e8ca021b9a9a89edb80 100644
--- a/arch/arm/dts/k3-am62l-main.dtsi
+++ b/arch/arm/dts/k3-am62l-main.dtsi
@@ -217,7 +217,7 @@ rti0: watchdog@e000000 {
 		clocks = <&scmi_clk 273>;
 		power-domains = <&scmi_pds 60>;
 		assigned-clocks = <&scmi_clk 273>;
-		assigned-clock-parents = <&scmi_clk 1>;
+		assigned-clock-parents = <&scmi_clk 275>;
 	};
 
 	rti1: watchdog@e010000 {
@@ -226,7 +226,7 @@ rti1: watchdog@e010000 {
 		clocks = <&scmi_clk 279>;
 		power-domains = <&scmi_pds 61>;
 		assigned-clocks = <&scmi_clk 279>;
-		assigned-clock-parents = <&scmi_clk 1>;
+		assigned-clock-parents = <&scmi_clk 281>;
 	};
 
 	fss: bus@fc00000 {
@@ -317,7 +317,7 @@ sdhci0: mmc@fa10000 {
 		clocks = <&scmi_clk 122>, <&scmi_clk 123>;
 		clock-names = "clk_ahb", "clk_xin";
 		assigned-clocks = <&scmi_clk 123>;
-		assigned-clock-parents = <&scmi_clk 0>;
+		assigned-clock-parents = <&scmi_clk 124>;
 		bus-width = <8>;
 		ti,clkbuf-sel = <0x7>;
 		ti,otap-del-sel-legacy = <0x0>;
@@ -334,7 +334,7 @@ sdhci1: mmc@fa00000 {
 		clocks = <&scmi_clk 106>, <&scmi_clk 107>;
 		clock-names = "clk_ahb", "clk_xin";
 		assigned-clocks = <&scmi_clk 107>;
-		assigned-clock-parents = <&scmi_clk 0>;
+		assigned-clock-parents = <&scmi_clk 108>;
 		bus-width = <4>;
 		ti,clkbuf-sel = <0x7>;
 		ti,otap-del-sel-legacy = <0x0>;
@@ -351,7 +351,7 @@ sdhci2: mmc@fa20000 {
 		clocks = <&scmi_clk 114>, <&scmi_clk 115>;
 		clock-names = "clk_ahb", "clk_xin";
 		assigned-clocks = <&scmi_clk 115>;
-		assigned-clock-parents = <&scmi_clk 0>;
+		assigned-clock-parents = <&scmi_clk 116>;
 		bus-width = <4>;
 		ti,clkbuf-sel = <0x7>;
 		ti,otap-del-sel-legacy = <0x0>;
@@ -600,7 +600,7 @@ tscadc0: tscadc@28001000 {
 		power-domains = <&scmi_pds 0>;
 		clocks = <&scmi_clk 0>;
 		assigned-clocks = <&scmi_clk 0>;
-		assigned-clock-parents = <&scmi_clk 2>;
+		assigned-clock-parents = <&scmi_clk 3>;
 		assigned-clock-rates = <60000000>;
 		clock-names = "fck";
 		status = "disabled";
@@ -618,7 +618,7 @@ dphy_tx0: phy@301c0000 {
 		clock-names = "psm", "pll_ref";
 		power-domains = <&scmi_pds 86>;
 		assigned-clocks = <&scmi_clk 341>;
-		assigned-clock-parents = <&scmi_clk 0>;
+		assigned-clock-parents = <&scmi_clk 342>;
 		assigned-clock-rates = <25000000>;
 		#phy-cells = <0>;
 		status = "disabled";

-- 
2.39.5