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Thu, 25 Sep 2025 13:59:25 +0200 From: David Picard Date: Thu, 25 Sep 2025 13:59:11 +0200 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250925-boards-enclustra-sa2-add-support-v2-4-6820ad6c6256@clermont.in2p3.fr> References: <20250925-boards-enclustra-sa2-add-support-v2-0-6820ad6c6256@clermont.in2p3.fr> In-Reply-To: <20250925-boards-enclustra-sa2-add-support-v2-0-6820ad6c6256@clermont.in2p3.fr> To: Sascha Hauer , BAREBOX Cc: David Picard X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758801565; l=2338; i=david.picard@clermont.in2p3.fr; s=20250917; h=from:subject:message-id; bh=w3cRqXVUNZgHERR0BTqW9wZRMeS/8Sssf+m7hrBDaAI=; b=QuKuxKhKzM7ZRCvKJRAgXzai1xgUnG3Cyi4xlnFLkoVLSEqOTMxOjW4uKY2OmRCVIfqzOsxA0 kN2H4oc8vyMDgitmyvZca1HVUbYOUHR/RkC/vyjpbVYvG8U0lhtiI6z X-Developer-Key: i=david.picard@clermont.in2p3.fr; a=ed25519; pk=Ew2hyxWdBXm7qaK2tHrk3KcOlOjoh3+irqJPSHtq/PU= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250925_045930_629681_E41D728B X-CRM114-Status: GOOD ( 10.55 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.whiteo.stw.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.1 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH v2 04/10] ARM: dts: socfpga: adapt upstream SA2 device tree X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.whiteo.stw.pengutronix.de) Adapt the upstream devicetree file: - use new Barebox deep-probe feature - make the compatible string more specific - enable LWHPS2FPGA and HPS2FPGA bridges to allow data exchange between FPGA and HPS Signed-off-by: David Picard --- arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi | 35 ++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi index 73bd75fcf224fbf31fce27dda6566d4bfe37d624..fa80b7c63d28d17a24d63ac3ee87531ad320ddb1 100644 --- a/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi @@ -9,9 +9,14 @@ #include +/ { + barebox,deep-probe; +}; + / { model = "Enclustra Mercury+ SA2"; - compatible = "altr,socfpga-cyclone5", "altr,socfpga"; + compatible = "enclustra,mercury-sa2-st1", "enclustra,mercury-sa2", "altr,socfpga-cyclone5", "altr,socfpga"; + chosen { stdout-path = "serial0:115200n8"; @@ -47,6 +52,16 @@ &osc1 { clock-frequency = <50000000>; }; +&fpga_bridge0 { + status = "okay"; + bridge-enable = <0x1>; +}; + +&fpga_bridge1 { + status = "okay"; + bridge-enable = <0x1>; +}; + &i2c_encl { i2c-sda-hold-time-ns = <300>; clock-frequency = <100000>; @@ -57,7 +72,8 @@ isl12020: rtc@6f { reg = <0x6f>; }; - atsha204a: crypto@64 { + atsha204a: atsha204a@64 { + status = "okay"; compatible = "atmel,atsha204a"; reg = <0x64>; }; @@ -125,6 +141,21 @@ mdio0 { phy3: ethernet-phy@3 { reg = <3>; + /* + Ethernet PHY reset pin (active low, GPIO44) : + - 1st field: GPIO controller phandle + - 2nd field: GPIO line offset + - 3rd field: flags (see gpio.txt) + + Reference: + - Cyclone 5 HPS technical reference, table 23-1: GPIO44 is on controller + GPIO1, whose 1st line is GPIO29. The offset is thus 44 - 29 = 15. + - Linux documentation: + - Documentation/devicetree/bindings/gpio/gpio.txt + - Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml + */ + reset-gpios = <&portb 15 0x01>; + /* Add 2ns RX clock delay (1.2ns + 0.78ns)*/ rxc-skew-ps = <1680>; rxd0-skew-ps = <420>; -- 2.43.0