[PATCH] net: designware-imx: don't set txclk when mode is (r)mii

[Maud Spierings via B4 Relay <devnull+maudspierings.gocontroll.com@kernel.org>]

From: Maud Spierings <maudspierings@gocontroll.com>

Add an early exit to eqos_set_txclk() when the mode is (r)mii.

The "tx" clock is actually something called the "slice 81 clock" which
must always be 50M for the rmii mode. This will later get divided into
the actual tx clock /2 or /20 which does match those clock rates. Still
the provided clock != tx clock when the mode is rmii.

Linux also excludes the mii mode from this clock lookup, even though
the clock rates actually seem to match there. I am not aware why it is
also excluded, it may be best to wait with merging this until [1] has
found an answer. But for now I thought it would be best to match Linux
behaviour.

Link: https://lore.kernel.org/all/aRclKDeHzfJSzpQ3@shell.armlinux.org.uk/ [1]

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
 drivers/net/designware_imx.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/designware_imx.c b/drivers/net/designware_imx.c
index ec3558fad0..bc3136f8ff 100644
--- a/drivers/net/designware_imx.c
+++ b/drivers/net/designware_imx.c
@@ -59,10 +59,15 @@ static unsigned long eqos_get_csr_clk_rate_imx(struct eqos *eqos)
 
 static int eqos_set_txclk(struct eqos *eqos, int speed)
 {
+	phy_interface_t interface = eqos->interface;
 	struct eqos_imx_priv *priv = eqos->priv;
 	unsigned long rate;
 	int ret;
 
+	if (interface == PHY_INTERFACE_MODE_RMII ||
+	    interface == PHY_INTERFACE_MODE_MII)
+		return 0;
+
 	switch (speed) {
 	case SPEED_10:
 		rate = 2500000;

---
base-commit: f485ddfccf960959d25462073528d314b8bf1aea
change-id: 20251114-eqos_rmii-dce3331ad692

Best regards,
-- 
Maud Spierings <maudspierings@gocontroll.com>