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From: Marco Felsch <m.felsch@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: BAREBOX <barebox@lists.infradead.org>
Subject: Re: [PATCH 2/9] soc: imx8mp: Soc ID is 128bit
Date: Fri, 14 Nov 2025 17:22:13 +0100	[thread overview]
Message-ID: <20251114162213.tweck3zgcgot3t6t@pengutronix.de> (raw)
In-Reply-To: <20251113-soc-uid-v1-2-29a256e07144@pengutronix.de>

Hi Sascha,

On 25-11-13, Sascha Hauer wrote:
> On i.MX8MP the SoC ID has 128 bits instead of 64 bits as on other i.MX8M
> SoCs. Read the remaining 64 bits which so far haven't been included in
> the SoC ID.

Linux fixed this as well in a non-backward compatible way. Don't get me
wrong this is the correct fix and we should fix it, but this change will
certainly influence in-field systems badly which rely on the the current
behavior e.g. to set the `systemd.machine` or which make use of the UID
to construct a hostname which is later on passed to the kernel cmdline
via `systemd.hostname`.

These systems now need to revert this change to archieve the same system
behavior. Can we add a Kconfig option or some function which can set the
soc_uid limit to keep these systems working.

Regards,
  Marco

> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  drivers/soc/imx/soc-imx8m.c | 33 +++++++++++++++++++++++----------
>  1 file changed, 23 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c
> index 3b83284fcbfd56d543cc300b8d42771202aa0bbb..b17f088ad04f3afbf06b823caaaefc1b19f664ea 100644
> --- a/drivers/soc/imx/soc-imx8m.c
> +++ b/drivers/soc/imx/soc-imx8m.c
> @@ -48,7 +48,7 @@ struct imx8_soc_data {
>  	void (*save_boot_loc)(void);
>  };
>  
> -static u64 soc_uid;
> +static u64 soc_uid[2];
>  
>  #ifdef CONFIG_HAVE_ARM_SMCCC
>  static u32 imx8mq_soc_revision_from_atf(void)
> @@ -99,9 +99,9 @@ static u32 __init imx8mq_soc_revision(void)
>  			rev = REV_B1;
>  	}
>  
> -	soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
> -	soc_uid <<= 32;
> -	soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
> +	soc_uid[0] = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
> +	soc_uid[0] <<= 32;
> +	soc_uid[0] |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
>  
>  	/* Keep the OCOTP clk on for the TF-A else the CPU stuck */
>  	of_node_put(np);
> @@ -109,13 +109,16 @@ static u32 __init imx8mq_soc_revision(void)
>  	return rev;
>  }
>  
> +#define IMX8MP_OCOTP_UID_2_LOW	0xe00
> +#define IMX8MP_OCOTP_UID_2_HIGH	0xe10
> +
>  static void __init imx8mm_soc_uid(void)
>  {
>  	void __iomem *ocotp_base;
>  	struct device_node *np;
>  	struct clk *clk;
> -	u32 offset = of_machine_is_compatible("fsl,imx8mp") ?
> -		     IMX8MP_OCOTP_UID_OFFSET : 0;
> +	bool is_imx8mp = of_machine_is_compatible("fsl,imx8mp");
> +	u32 offset = is_imx8mp ? IMX8MP_OCOTP_UID_OFFSET : 0;
>  
>  	np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp");
>  	if (!np)
> @@ -131,9 +134,15 @@ static void __init imx8mm_soc_uid(void)
>  
>  	clk_prepare_enable(clk);
>  
> -	soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
> -	soc_uid <<= 32;
> -	soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
> +	soc_uid[0] = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
> +	soc_uid[0] <<= 32;
> +	soc_uid[0] |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
> +
> +	if (is_imx8mp) {
> +		soc_uid[1] = readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_2_HIGH);
> +		soc_uid[1] <<= 32;
> +		soc_uid[1] |= readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_2_LOW);
> +	}
>  
>  	/* Keep the OCOTP clk on for the TF-A else the CPU stuck */
>  	of_node_put(np);
> @@ -265,7 +274,11 @@ static int __init imx8_soc_init(void)
>  		goto free_soc;
>  	}
>  
> -	soc_dev_attr->serial_number = xasprintf("%016llX", soc_uid);
> +	if (soc_uid[1])
> +		soc_dev_attr->serial_number = xasprintf("%016llX%016llX",
> +							soc_uid[1], soc_uid[0]);
> +	else
> +		soc_dev_attr->serial_number = xasprintf("%016llX", soc_uid[0]);
>  	if (!soc_dev_attr->serial_number) {
>  		ret = -ENOMEM;
>  		goto free_rev;
> 
> -- 
> 2.47.3
> 
> 
> 

-- 
#gernperDu 
#CallMeByMyFirstName

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  reply	other threads:[~2025-11-14 16:23 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-13  9:34 [PATCH 0/9] Unify SoC UID and machine hashable data Sascha Hauer
2025-11-13  9:34 ` [PATCH 1/9] introduce SoC UID Sascha Hauer
2025-11-13  9:34 ` [PATCH 2/9] soc: imx8mp: Soc ID is 128bit Sascha Hauer
2025-11-14 16:22   ` Marco Felsch [this message]
2025-11-14 20:08     ` Sascha Hauer
2025-11-13  9:34 ` [PATCH 3/9] ARM: i.MX6: print leading zero for SoC ID Sascha Hauer
2025-11-13  9:34 ` [PATCH 4/9] nvmem: bsec: call barebox_set_soc_uid() Sascha Hauer
2025-11-13  9:34 ` [PATCH 5/9] nvmem: imx-ocotp-ele: " Sascha Hauer
2025-11-13  9:34 ` [PATCH 6/9] nvmem: ocotp: Fix SoC ID reading for i.MX8MP Sascha Hauer
2025-11-13  9:34 ` [PATCH 7/9] nvmem: imx-ocotp: call barebox_set_soc_uid() Sascha Hauer
2025-11-13  9:34 ` [PATCH 8/9] soc: imx8m: register SoC UID Sascha Hauer
2025-11-13  9:34 ` [PATCH 9/9] Documentation: migration: add i.MX8MP SoC UID change note Sascha Hauer

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