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From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>
Subject: [PATCH v2 0/9] Unify SoC UID and machine hashable data
Date: Mon, 17 Nov 2025 09:35:33 +0100	[thread overview]
Message-ID: <20251117-soc-uid-v2-0-a2415bf9133d@pengutronix.de> (raw)

SoC UID and machine hashable data are both based on the same data but
are both registered at different places with different functions.

This series aims to unify this by adding a function which uses the
passed SoC UID to provide it to the environment and also to register
machine hashable data.

The SoC ID code on i.MX is quite a mess and this series cleans this
up a bit. We have drivers/nvmem/ocotp.c which reads the SoC ID and
provides machine hashable data and we have drivers/soc/imx/soc-imx8m.c
which implements a SoC driver and exposes soc0.serial_number, but
the SoC driver only works on i.MX8M which is a subset of the SoCs
supported by the ocotp driver.

Furthermore I realized that on i.MX8MP the SoC ID is 128bit whereas
we currently only use 64bit which additionally read from the wrong
registers. This series fixes this, but doing so will change the
machine_id passed to Linux which may break userspace, so a new
config option ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID is introduced.
Enabling this will keep the old SoC ID.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
Changes in v2:
- Add CONFIG_ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID
- Link to v1: https://lore.barebox.org/20251113-soc-uid-v1-0-29a256e07144@pengutronix.de

---
Sascha Hauer (9):
      introduce SoC UID
      soc: imx8mp: Soc ID is 128bit
      ARM: i.MX6: print leading zero for SoC ID
      nvmem: bsec: call barebox_set_soc_uid()
      nvmem: imx-ocotp-ele: call barebox_set_soc_uid()
      nvmem: ocotp: Fix SoC ID reading for i.MX8MP
      nvmem: imx-ocotp: call barebox_set_soc_uid()
      soc: imx8m: register SoC UID
      Documentation: migration: add i.MX8MP SoC UID change note

 .../migration-guides/migration-master.rst          | 10 ++++
 arch/arm/mach-imx/Kconfig                          | 10 ++++
 arch/arm/mach-imx/imx6.c                           |  2 +-
 common/misc.c                                      | 58 ++++++++++++++++++++++
 drivers/nvmem/bsec.c                               |  8 +--
 drivers/nvmem/imx-ocotp-ele.c                      | 12 +++--
 drivers/nvmem/ocotp.c                              | 48 +++++++++++++++---
 drivers/soc/imx/soc-imx8m.c                        | 37 ++++++++++----
 include/barebox-info.h                             |  4 ++
 include/mach/imx/generic.h                         |  5 ++
 10 files changed, 169 insertions(+), 25 deletions(-)
---
base-commit: 776a3ddf6823a8397763212bcc16d408ac4cc958
change-id: 20251113-soc-uid-21daee8feac6

Best regards,
-- 
Sascha Hauer <s.hauer@pengutronix.de>




             reply	other threads:[~2025-11-17  8:36 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-17  8:35 Sascha Hauer [this message]
2025-11-17  8:35 ` [PATCH v2 1/9] introduce SoC UID Sascha Hauer
2025-11-17 10:16   ` Jonas Rebmann
2025-11-17 11:28     ` Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit Sascha Hauer
2025-11-17  9:59   ` Jonas Rebmann
2025-11-17 11:02     ` Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 3/9] ARM: i.MX6: print leading zero for SoC ID Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 4/9] nvmem: bsec: call barebox_set_soc_uid() Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 5/9] nvmem: imx-ocotp-ele: " Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 6/9] nvmem: ocotp: Fix SoC ID reading for i.MX8MP Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 7/9] nvmem: imx-ocotp: call barebox_set_soc_uid() Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 8/9] soc: imx8m: register SoC UID Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 9/9] Documentation: migration: add i.MX8MP SoC UID change note Sascha Hauer

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