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* [PATCH v2 0/9] Unify SoC UID and machine hashable data
@ 2025-11-17  8:35 Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 1/9] introduce SoC UID Sascha Hauer
                   ` (8 more replies)
  0 siblings, 9 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

SoC UID and machine hashable data are both based on the same data but
are both registered at different places with different functions.

This series aims to unify this by adding a function which uses the
passed SoC UID to provide it to the environment and also to register
machine hashable data.

The SoC ID code on i.MX is quite a mess and this series cleans this
up a bit. We have drivers/nvmem/ocotp.c which reads the SoC ID and
provides machine hashable data and we have drivers/soc/imx/soc-imx8m.c
which implements a SoC driver and exposes soc0.serial_number, but
the SoC driver only works on i.MX8M which is a subset of the SoCs
supported by the ocotp driver.

Furthermore I realized that on i.MX8MP the SoC ID is 128bit whereas
we currently only use 64bit which additionally read from the wrong
registers. This series fixes this, but doing so will change the
machine_id passed to Linux which may break userspace, so a new
config option ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID is introduced.
Enabling this will keep the old SoC ID.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
Changes in v2:
- Add CONFIG_ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID
- Link to v1: https://lore.barebox.org/20251113-soc-uid-v1-0-29a256e07144@pengutronix.de

---
Sascha Hauer (9):
      introduce SoC UID
      soc: imx8mp: Soc ID is 128bit
      ARM: i.MX6: print leading zero for SoC ID
      nvmem: bsec: call barebox_set_soc_uid()
      nvmem: imx-ocotp-ele: call barebox_set_soc_uid()
      nvmem: ocotp: Fix SoC ID reading for i.MX8MP
      nvmem: imx-ocotp: call barebox_set_soc_uid()
      soc: imx8m: register SoC UID
      Documentation: migration: add i.MX8MP SoC UID change note

 .../migration-guides/migration-master.rst          | 10 ++++
 arch/arm/mach-imx/Kconfig                          | 10 ++++
 arch/arm/mach-imx/imx6.c                           |  2 +-
 common/misc.c                                      | 58 ++++++++++++++++++++++
 drivers/nvmem/bsec.c                               |  8 +--
 drivers/nvmem/imx-ocotp-ele.c                      | 12 +++--
 drivers/nvmem/ocotp.c                              | 48 +++++++++++++++---
 drivers/soc/imx/soc-imx8m.c                        | 37 ++++++++++----
 include/barebox-info.h                             |  4 ++
 include/mach/imx/generic.h                         |  5 ++
 10 files changed, 169 insertions(+), 25 deletions(-)
---
base-commit: 776a3ddf6823a8397763212bcc16d408ac4cc958
change-id: 20251113-soc-uid-21daee8feac6

Best regards,
-- 
Sascha Hauer <s.hauer@pengutronix.de>




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 1/9] introduce SoC UID
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17 10:16   ` Jonas Rebmann
  2025-11-17  8:35 ` [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit Sascha Hauer
                   ` (7 subsequent siblings)
  8 siblings, 1 reply; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

Most SoCs have a unique ID (UID) which can be used to identify a
particular SoC instance. This is exposed to the environment by some SoC
drivers as soc0.serial_number like also done in Linux. The SoC UID can
also conveniently be used to generate a unique machine_id on systems
with a readonly rootfs. The two usecases require the SoC UID in different
formats. While machine_id_set_hashable() takes a binary representation
of the SoC UID, soc0.serial_number is a string. The conversion from the
binary representation to the string is SoC specific, some SoCs interpret
the binary data as a byte array (AM62x for example), others interpret it
as words of different lengths in different endianesses (i.MX). Others
even print the binary data as decimal (qcom).

Needing a SoC driver for providing the SoC UID is an unlucky choice as
some SoCs do not have a SoC driver, but instead read the SoC UID in
their eFuse driver in drivers/nvmem (STM32MP bsec). These drivers
provide hashable data to generate a machine_id, but do not expose the
SoC ID.

This patch introduces barebox_set_soc_uid(). This function provides a
new environment variable global.soc_uid which contains the SoC UID.
It also passes the SoC UID to machine_id_set_hashable() for generating a
machine_id. To accomodate for different string representations of the
binary data barebox_set_soc_uid() takes both the binary data and a
string in the SoCs preferred format of the same data.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 common/misc.c          | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++
 include/barebox-info.h |  4 ++++
 2 files changed, 62 insertions(+)

diff --git a/common/misc.c b/common/misc.c
index 0af5a9cf30cdb952063974969c368061420a6e2b..ef6687f01389beaed44fc446b25ec5f21e712366 100644
--- a/common/misc.c
+++ b/common/misc.c
@@ -16,6 +16,7 @@
 #include <restart.h>
 #include <poweroff.h>
 #include <string.h>
+#include <machine_id.h>
 #include <linux/stringify.h>
 
 int errno;
@@ -252,6 +253,63 @@ const char *barebox_get_serial_number(void)
 
 BAREBOX_MAGICVAR(global.serial_number, "Board serial number");
 
+static char *soc_uid_str;
+static void *soc_uid;
+static size_t soc_uid_len;
+
+/*
+ * barebox_set_soc_uid - set a Unique SoC ID
+ *
+ * Set a Unique SoC ID. The ID is usually read from SoC internal eFuses. It
+ * can vary in length on different SoCs and can have different canonical hex
+ * representations. @uidstr can be NULL in which case uidbuf is interpreted
+ * as a byte array.
+ *
+ * barebox uses the SoC ID to generate a machine_id and exports it to the
+ * environment via global.soc_uid.
+ *
+ * In Linux the serial number is exported as /sys/devices/soc0/serial_number
+ * which should generally have the same format as *uidstr.
+ */
+void barebox_set_soc_uid(const char *uidstr, const void *uidbuf, size_t len)
+{
+	if (soc_uid_str) {
+		pr_warn("SoC UID already set. Ignoring\n");
+		return;
+	}
+
+	soc_uid = xmemdup(uidbuf, len);
+	soc_uid_len = len;
+
+	if (uidstr) {
+		soc_uid_str = xstrdup(uidstr);
+	} else {
+		soc_uid_str = xzalloc(len * 2 + 1);
+		bin2hex(soc_uid_str, uidbuf, len);
+	}
+
+	machine_id_set_hashable(uidbuf, len);
+
+	globalvar_add_simple_string("soc_uid", &soc_uid_str);
+}
+BAREBOX_MAGICVAR(global.soc_uid, "SoC Unique ID");
+
+const char *barebox_get_soc_uid(void)
+{
+	return soc_uid_str;
+}
+
+int barebox_get_soc_uid_bin(const void **buf, size_t *len)
+{
+	if (!soc_uid)
+		return -ENOENT;
+
+	*buf = soc_uid;
+	*len = soc_uid_len;
+
+	return 0;
+}
+
 #ifdef CONFIG_OFTREE
 static char *of_machine_compatible;
 
diff --git a/include/barebox-info.h b/include/barebox-info.h
index bcceb7b0e0211c8c7dccd6b9f480c9fbc13dcf63..898fb493b6348ee64670f928a3598a7c3d277554 100644
--- a/include/barebox-info.h
+++ b/include/barebox-info.h
@@ -25,6 +25,10 @@ bool barebox_hostname_is_valid(const char *s);
 const char *barebox_get_serial_number(void);
 void barebox_set_serial_number(const char *);
 
+void barebox_set_soc_uid(const char *uidstr, const void *uidbuf, size_t len);
+const char *barebox_get_soc_uid(void);
+int barebox_get_soc_uid_bin(const void **buf, size_t *len);
+
 #ifdef CONFIG_OFTREE
 void barebox_set_of_machine_compatible(const char *);
 const char *barebox_get_of_machine_compatible(void);

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 1/9] introduce SoC UID Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17  9:59   ` Jonas Rebmann
  2025-11-17  8:35 ` [PATCH v2 3/9] ARM: i.MX6: print leading zero for SoC ID Sascha Hauer
                   ` (6 subsequent siblings)
  8 siblings, 1 reply; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

On i.MX8MP the SoC ID has 128 bits instead of 64 bits as on other i.MX8M
SoCs. Read the remaining 64 bits which so far haven't been included in
the SoC ID.

On already rolled out devices a change of the SoC ID is undesired, so
this commit introduces CONFIG_ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID. With
this option enabled the old SoC ID will be used.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/Kconfig   | 10 ++++++++++
 drivers/soc/imx/soc-imx8m.c | 33 +++++++++++++++++++++++----------
 include/mach/imx/generic.h  |  5 +++++
 3 files changed, 38 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f50d1a8233ca0e034e5f9b83343a02e7b6a35b8..3edf95af2b1896ad9d5cb0981e54d2af372dd49c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -823,6 +823,16 @@ config IMX_SAVE_BOOTROM_LOG
 	bool
 	default CMD_BOOTROM
 
+config ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID
+	bool "Keep compatible i.MX8MP SOC UID"
+	depends on ARCH_IMX8MP
+	help
+	  barebox used to wrongly read out the i.MX8MP SOC UID. The SOC UID on
+	  i.MX8MP is 128bits wide, but we used to only use 64bit. As the
+	  machine_id might be generated from the SOC UID already deployed
+	  systems might depend on the SOC UID staying constant. Enable this
+	  option to keep the old behaviour.
+
 config HAB
 	bool
 
diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c
index 3b83284fcbfd56d543cc300b8d42771202aa0bbb..06c524308e83b2d2b57615b9dc60652400f202e2 100644
--- a/drivers/soc/imx/soc-imx8m.c
+++ b/drivers/soc/imx/soc-imx8m.c
@@ -48,7 +48,7 @@ struct imx8_soc_data {
 	void (*save_boot_loc)(void);
 };
 
-static u64 soc_uid;
+static u64 soc_uid[2];
 
 #ifdef CONFIG_HAVE_ARM_SMCCC
 static u32 imx8mq_soc_revision_from_atf(void)
@@ -99,9 +99,9 @@ static u32 __init imx8mq_soc_revision(void)
 			rev = REV_B1;
 	}
 
-	soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
-	soc_uid <<= 32;
-	soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
+	soc_uid[0] = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
+	soc_uid[0] <<= 32;
+	soc_uid[0] |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
 
 	/* Keep the OCOTP clk on for the TF-A else the CPU stuck */
 	of_node_put(np);
@@ -109,13 +109,16 @@ static u32 __init imx8mq_soc_revision(void)
 	return rev;
 }
 
+#define IMX8MP_OCOTP_UID_2_LOW	0xe00
+#define IMX8MP_OCOTP_UID_2_HIGH	0xe10
+
 static void __init imx8mm_soc_uid(void)
 {
 	void __iomem *ocotp_base;
 	struct device_node *np;
 	struct clk *clk;
-	u32 offset = of_machine_is_compatible("fsl,imx8mp") ?
-		     IMX8MP_OCOTP_UID_OFFSET : 0;
+	bool is_imx8mp = of_machine_is_compatible("fsl,imx8mp");
+	u32 offset = is_imx8mp ? IMX8MP_OCOTP_UID_OFFSET : 0;
 
 	np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp");
 	if (!np)
@@ -131,9 +134,15 @@ static void __init imx8mm_soc_uid(void)
 
 	clk_prepare_enable(clk);
 
-	soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
-	soc_uid <<= 32;
-	soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
+	soc_uid[0] = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
+	soc_uid[0] <<= 32;
+	soc_uid[0] |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
+
+	if (is_imx8mp) {
+		soc_uid[1] = readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_2_HIGH);
+		soc_uid[1] <<= 32;
+		soc_uid[1] |= readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_2_LOW);
+	}
 
 	/* Keep the OCOTP clk on for the TF-A else the CPU stuck */
 	of_node_put(np);
@@ -265,7 +274,11 @@ static int __init imx8_soc_init(void)
 		goto free_soc;
 	}
 
-	soc_dev_attr->serial_number = xasprintf("%016llX", soc_uid);
+	if (soc_uid[1] && !imx8mp_keep_compatible_soc_uid())
+		soc_dev_attr->serial_number = xasprintf("%016llX%016llX",
+							soc_uid[1], soc_uid[0]);
+	else
+		soc_dev_attr->serial_number = xasprintf("%016llX", soc_uid[0]);
 	if (!soc_dev_attr->serial_number) {
 		ret = -ENOMEM;
 		goto free_rev;
diff --git a/include/mach/imx/generic.h b/include/mach/imx/generic.h
index a0f65391686b479136f08b699fca34c45d915761..5f81aa65a7452f30084acd61a04d47d429e99d12 100644
--- a/include/mach/imx/generic.h
+++ b/include/mach/imx/generic.h
@@ -77,6 +77,11 @@ void imx8mn_cpu_lowlevel_init(void);
 void imx8mp_cpu_lowlevel_init(void);
 void imx93_cpu_lowlevel_init(void);
 
+static inline bool imx8mp_keep_compatible_soc_uid(void)
+{
+	return IS_ENABLED(CONFIG_ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID);
+}
+
 /* There's a off-by-one betweem the gpio bank number and the gpiochip */
 /* range e.g. GPIO_1_5 is gpio 5 under linux */
 #define IMX_GPIO_NR(bank, nr)		(((bank) - 1) * 32 + (nr))

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 3/9] ARM: i.MX6: print leading zero for SoC ID
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 1/9] introduce SoC UID Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 4/9] nvmem: bsec: call barebox_set_soc_uid() Sascha Hauer
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

Print leading zeroes for the SoC ID which is the same as other places
incuding Linux do which print the i.MX SoC ID.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/imx6.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 29a56de56293d0cd11b51e23b3528a5f2af9a43b..8319251ec5fdbfe0b05f6d44e07bbe719eb31e26 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -226,7 +226,7 @@ int imx6_init(void)
 
 	imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
 	imx_set_reset_reason(src + IMX_SRC_SRSR, imx_reset_reasons);
-	pr_info("%s unique ID: %llx\n", cputypestr, mx6_uid);
+	pr_info("%s unique ID: %0llx\n", cputypestr, mx6_uid);
 
 	imx6_setup_ipu_qos();
 	imx6ul_enet_clk_init();

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 4/9] nvmem: bsec: call barebox_set_soc_uid()
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
                   ` (2 preceding siblings ...)
  2025-11-17  8:35 ` [PATCH v2 3/9] ARM: i.MX6: print leading zero for SoC ID Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 5/9] nvmem: imx-ocotp-ele: " Sascha Hauer
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

barebox_set_soc_uid() calls barebox_set_soc_uid() the same way as done
previously, but also exposes the SoC ID in the barebox environment.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/nvmem/bsec.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/nvmem/bsec.c b/drivers/nvmem/bsec.c
index b67b55addfe0ebf1546e6b382a1f65af5c3ad423..1e85d4c9fcb43e90657ebf65bde976293bfa042f 100644
--- a/drivers/nvmem/bsec.c
+++ b/drivers/nvmem/bsec.c
@@ -110,13 +110,16 @@ static void stm32_bsec_set_unique_machine_id(struct regmap *map)
 {
 	u32 unique_id[3];
 	int ret;
+	char *uidstr;
 
 	ret = regmap_bulk_read(map, BSEC_OTP_SERIAL * 4,
 			       unique_id, sizeof(unique_id) / 4);
 	if (ret)
 		return;
 
-	machine_id_set_hashable(unique_id, sizeof(unique_id));
+	uidstr = xasprintf("%08X%08X%08X", unique_id[0], unique_id[1], unique_id[2);
+	barebox_set_soc_uid(uidstr, unique_id, sizeof(unique_id));
+	free(uidstr);
 }
 
 static int stm32_bsec_read_mac(struct bsec_priv *priv, int offset, u8 *mac)
@@ -278,8 +281,7 @@ static int stm32_bsec_probe(struct device *dev)
 	if (IS_ERR(nvmem))
 		return PTR_ERR(nvmem);
 
-	if (IS_ENABLED(CONFIG_MACHINE_ID))
-		stm32_bsec_set_unique_machine_id(map);
+	stm32_bsec_set_unique_machine_id(map);
 
 	stm32_bsec_init_dt(priv, dev, map);
 

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 5/9] nvmem: imx-ocotp-ele: call barebox_set_soc_uid()
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
                   ` (3 preceding siblings ...)
  2025-11-17  8:35 ` [PATCH v2 4/9] nvmem: bsec: call barebox_set_soc_uid() Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 6/9] nvmem: ocotp: Fix SoC ID reading for i.MX8MP Sascha Hauer
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

barebox_set_soc_uid() calls barebox_set_soc_uid() the same way as done
previously, but also exposes the SoC ID in the barebox environment.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/nvmem/imx-ocotp-ele.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/nvmem/imx-ocotp-ele.c b/drivers/nvmem/imx-ocotp-ele.c
index 797c6f8d7a2a069fbf342c517031eb5dc3f09d7a..ee7c5a3d4a43e00a7d09ebbca3b703db685053f5 100644
--- a/drivers/nvmem/imx-ocotp-ele.c
+++ b/drivers/nvmem/imx-ocotp-ele.c
@@ -143,13 +143,20 @@ static void imx_ocotp_set_unique_machine_id(struct imx_ocotp_priv *priv)
 {
 	uint32_t unique_id_parts[UNIQUE_ID_NUM];
 	int i;
+	char *uidstr;
 
 	for (i = 0; i < UNIQUE_ID_NUM; i++)
 		if (imx_ocotp_reg_read(priv, OCOTP_UNIQUE_ID(i),
 					 &unique_id_parts[i]))
 			return;
 
-	machine_id_set_hashable(unique_id_parts, sizeof(unique_id_parts));
+	uidstr = xasprintf("%08X%08X%08X%08X",
+			   unique_id_parts[1], unique_id_parts[0],
+			   unique_id_parts[3], unique_id_parts[2]);
+
+	barebox_set_soc_uid(uidstr, unique_id_parts, sizeof(unique_id_parts));
+
+	free(uidstr);
 }
 
 static int permanent_write_enable_set(struct param_d *param, void *ctx)
@@ -194,8 +201,7 @@ static int imx_ele_ocotp_probe(struct device *dev)
 	if (IS_ERR(priv->map))
 		return PTR_ERR(priv->map);
 
-	if (IS_ENABLED(CONFIG_MACHINE_ID))
-		imx_ocotp_set_unique_machine_id(priv);
+	imx_ocotp_set_unique_machine_id(priv);
 
 	nvmem = nvmem_regmap_register_with_pp(priv->map, "imx_ocotp",
 					      imx_ocotp_fixup_dt_cell_info);

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 6/9] nvmem: ocotp: Fix SoC ID reading for i.MX8MP
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
                   ` (4 preceding siblings ...)
  2025-11-17  8:35 ` [PATCH v2 5/9] nvmem: imx-ocotp-ele: " Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 7/9] nvmem: imx-ocotp: call barebox_set_soc_uid() Sascha Hauer
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

On i.MX8MP the SoC ID is stored at 0x420/0x430, not on 0x410/0x420 as on
other i.MX8M SoCs. Also on i.MX8MP the SoC ID is 128bit and not 64bit
with the upper bits stored at 0xe00/0xe10.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/nvmem/ocotp.c | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c
index 7bca27540417ad9ba0ce5c5f8ec43ad1c63638b9..affca938849d0d1a8dc347e3a0e1f3a380f1aab7 100644
--- a/drivers/nvmem/ocotp.c
+++ b/drivers/nvmem/ocotp.c
@@ -853,17 +853,38 @@ static int imx_ocotp_init_dt(struct ocotp_priv *priv)
 	return imx8m_feat_ctrl_init(priv->dev.parent, tester3, tester4, priv->data->feat);
 }
 
+#define IMX8MP_OCOTP_UID(n)	\
+	(OCOTP_WORD(0x420 + 0x10 * (n)) | OCOTP_BIT(0) | OCOTP_WIDTH(32))
+#define IMX8MP_OCOTP_UID_2(n)	\
+	(OCOTP_WORD(0xe00 + 0x10 * (n)) | OCOTP_BIT(0) | OCOTP_WIDTH(32))
+
 static void imx_ocotp_set_unique_machine_id(void)
 {
-	uint32_t unique_id_parts[UNIQUE_ID_NUM];
-	int i;
+	bool is_imx8mp = of_machine_is_compatible("fsl,imx8mp");
+	uint32_t uid[4];
+	int len;
 
-	for (i = 0; i < UNIQUE_ID_NUM; i++)
-		if (imx_ocotp_read_field(OCOTP_UNIQUE_ID(i),
-					 &unique_id_parts[i]))
+	if (is_imx8mp) {
+		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID(0), &uid[0]))
+			return;
+		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID(1), &uid[1]))
+			return;
+
+		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID_2(0), &uid[2]))
+			return;
+		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID_2(1), &uid[3]))
 			return;
+		len = sizeof(uid);
+	} else {
+		if (imx_ocotp_read_field(OCOTP_UNIQUE_ID(0), &uid[0]))
+			return;
+		if (imx_ocotp_read_field(OCOTP_UNIQUE_ID(1), &uid[1]))
+			return;
+
+		len = sizeof(uid) / 2;
+	}
 
-	machine_id_set_hashable(unique_id_parts, sizeof(unique_id_parts));
+	machine_id_set_hashable(uid, len);
 }
 
 static int imx_ocotp_probe(struct device *dev)

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 7/9] nvmem: imx-ocotp: call barebox_set_soc_uid()
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
                   ` (5 preceding siblings ...)
  2025-11-17  8:35 ` [PATCH v2 6/9] nvmem: ocotp: Fix SoC ID reading for i.MX8MP Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 8/9] soc: imx8m: register SoC UID Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 9/9] Documentation: migration: add i.MX8MP SoC UID change note Sascha Hauer
  8 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

barebox_set_soc_uid() calls barebox_set_soc_uid() the same way as done
previously, but also exposes the SoC ID in the barebox environment.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/nvmem/ocotp.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c
index affca938849d0d1a8dc347e3a0e1f3a380f1aab7..4d12426275426acb69f8e8349cf56367a3f1f80d 100644
--- a/drivers/nvmem/ocotp.c
+++ b/drivers/nvmem/ocotp.c
@@ -863,6 +863,7 @@ static void imx_ocotp_set_unique_machine_id(void)
 	bool is_imx8mp = of_machine_is_compatible("fsl,imx8mp");
 	uint32_t uid[4];
 	int len;
+	char *uidstr;
 
 	if (is_imx8mp) {
 		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID(0), &uid[0]))
@@ -875,6 +876,7 @@ static void imx_ocotp_set_unique_machine_id(void)
 		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID_2(1), &uid[3]))
 			return;
 		len = sizeof(uid);
+		uidstr = xasprintf("%08X%08X%08X%08X", uid[3], uid[2], uid[1], uid[0]);
 	} else {
 		if (imx_ocotp_read_field(OCOTP_UNIQUE_ID(0), &uid[0]))
 			return;
@@ -882,9 +884,11 @@ static void imx_ocotp_set_unique_machine_id(void)
 			return;
 
 		len = sizeof(uid) / 2;
+		uidstr = xasprintf("%08X%08X", uid[1], uid[0]);
 	}
 
-	machine_id_set_hashable(uid, len);
+	barebox_set_soc_uid(uidstr, &uid, sizeof(uid));
+	free(uidstr);
 }
 
 static int imx_ocotp_probe(struct device *dev)
@@ -960,8 +964,7 @@ static int imx_ocotp_probe(struct device *dev)
 				  ethaddr->value, ethaddr);
 	}
 
-	if (IS_ENABLED(CONFIG_MACHINE_ID))
-		imx_ocotp_set_unique_machine_id();
+	imx_ocotp_set_unique_machine_id();
 
 	ret = imx_ocotp_init_dt(priv);
 	if (ret)

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 8/9] soc: imx8m: register SoC UID
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
                   ` (6 preceding siblings ...)
  2025-11-17  8:35 ` [PATCH v2 7/9] nvmem: imx-ocotp: call barebox_set_soc_uid() Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  2025-11-17  8:35 ` [PATCH v2 9/9] Documentation: migration: add i.MX8MP SoC UID change note Sascha Hauer
  8 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

Just like the ocotp driver the i.MX8M SoC driver also reads the SoC UID.
Unlike the ocotp driver the i.MX8M SoC driver is always enabled, so if
we don't have the ocotp driver enabled then register the SoC UID from
the SoC driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/nvmem/ocotp.c       | 12 ++++++++++--
 drivers/soc/imx/soc-imx8m.c |  4 ++++
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c
index 4d12426275426acb69f8e8349cf56367a3f1f80d..fa80f1bfe2324d6667c789758bfd683451cb5f80 100644
--- a/drivers/nvmem/ocotp.c
+++ b/drivers/nvmem/ocotp.c
@@ -31,6 +31,7 @@
 #ifdef CONFIG_ARCH_IMX
 #include <mach/imx/ocotp.h>
 #include <mach/imx/ocotp-fusemap.h>
+#include <mach/imx/generic.h>
 #else
 #include <mach/mxs/ocotp.h>
 #include <mach/mxs/ocotp-fusemap.h>
@@ -853,6 +854,13 @@ static int imx_ocotp_init_dt(struct ocotp_priv *priv)
 	return imx8m_feat_ctrl_init(priv->dev.parent, tester3, tester4, priv->data->feat);
 }
 
+#ifndef CONFIG_ARCH_IMX
+static inline bool imx8mp_keep_compatible_soc_uid(void)
+{
+	return false;
+}
+#endif
+
 #define IMX8MP_OCOTP_UID(n)	\
 	(OCOTP_WORD(0x420 + 0x10 * (n)) | OCOTP_BIT(0) | OCOTP_WIDTH(32))
 #define IMX8MP_OCOTP_UID_2(n)	\
@@ -865,7 +873,7 @@ static void imx_ocotp_set_unique_machine_id(void)
 	int len;
 	char *uidstr;
 
-	if (is_imx8mp) {
+	if (is_imx8mp && !imx8mp_keep_compatible_soc_uid()) {
 		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID(0), &uid[0]))
 			return;
 		if (imx_ocotp_read_field(IMX8MP_OCOTP_UID(1), &uid[1]))
@@ -887,7 +895,7 @@ static void imx_ocotp_set_unique_machine_id(void)
 		uidstr = xasprintf("%08X%08X", uid[1], uid[0]);
 	}
 
-	barebox_set_soc_uid(uidstr, &uid, sizeof(uid));
+	barebox_set_soc_uid(uidstr, &uid, len);
 	free(uidstr);
 }
 
diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c
index 06c524308e83b2d2b57615b9dc60652400f202e2..6f61bdb9e8d3f0bd05282d585a066d45a7ef5305 100644
--- a/drivers/soc/imx/soc-imx8m.c
+++ b/drivers/soc/imx/soc-imx8m.c
@@ -284,6 +284,10 @@ static int __init imx8_soc_init(void)
 		goto free_rev;
 	}
 
+	if (!IS_ENABLED(CONFIG_IMX_OCOTP))
+		barebox_set_soc_uid(soc_dev_attr->serial_number, soc_uid,
+				    sizeof(soc_uid));
+
 	soc_dev = soc_device_register(soc_dev_attr);
 	if (IS_ERR(soc_dev)) {
 		ret = PTR_ERR(soc_dev);

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 9/9] Documentation: migration: add i.MX8MP SoC UID change note
  2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
                   ` (7 preceding siblings ...)
  2025-11-17  8:35 ` [PATCH v2 8/9] soc: imx8m: register SoC UID Sascha Hauer
@ 2025-11-17  8:35 ` Sascha Hauer
  8 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17  8:35 UTC (permalink / raw)
  To: BAREBOX

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 Documentation/migration-guides/migration-master.rst | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/migration-guides/migration-master.rst b/Documentation/migration-guides/migration-master.rst
new file mode 100644
index 0000000000000000000000000000000000000000..5e1f15fe8988e178a4bb5fe12f0a9832391bfc51
--- /dev/null
+++ b/Documentation/migration-guides/migration-master.rst
@@ -0,0 +1,10 @@
+
+NXP i.MX8MP
+-----------
+
+* The i.MX8MP SoC UID really is 128bit. With this release all 128bit
+  are used for the SoC UID, previously only 64bit were used. This will
+  result in a different SoC UID and consequently a different machine_id
+  when systemd.machine_id is passed to Linux. If you need to keep the
+  previous 64bit SoC UID for compatibility reasons enable
+  CONFIG_ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID

-- 
2.47.3




^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit
  2025-11-17  8:35 ` [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit Sascha Hauer
@ 2025-11-17  9:59   ` Jonas Rebmann
  2025-11-17 11:02     ` Sascha Hauer
  0 siblings, 1 reply; 14+ messages in thread
From: Jonas Rebmann @ 2025-11-17  9:59 UTC (permalink / raw)
  To: Sascha Hauer, BAREBOX

Hi Sascha,

On 2025-11-17 09:35, Sascha Hauer wrote:
> On i.MX8MP the SoC ID has 128 bits instead of 64 bits as on other i.MX8M
> SoCs. Read the remaining 64 bits which so far haven't been included in
> the SoC ID.
> 
> On already rolled out devices a change of the SoC ID is undesired, so
> this commit introduces CONFIG_ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID. With
> this option enabled the old SoC ID will be used.

I think we should avoid using the terms SoC ID and SoC UID
interchangeably. Apparently some (TI) refer to SoC part numbers as SoC
IDs, which I find confusing enough by itself.

Regards,
Jonas

-- 
Pengutronix e.K.                           | Jonas Rebmann               |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-9    |



^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 1/9] introduce SoC UID
  2025-11-17  8:35 ` [PATCH v2 1/9] introduce SoC UID Sascha Hauer
@ 2025-11-17 10:16   ` Jonas Rebmann
  2025-11-17 11:28     ` Sascha Hauer
  0 siblings, 1 reply; 14+ messages in thread
From: Jonas Rebmann @ 2025-11-17 10:16 UTC (permalink / raw)
  To: Sascha Hauer, BAREBOX

Hi Sascha,

On 2025-11-17 09:35, Sascha Hauer wrote:
> Most SoCs have a unique ID (UID) which can be used to identify a
> particular SoC instance. This is exposed to the environment by some SoC
> drivers as soc0.serial_number like also done in Linux. The SoC UID can
> also conveniently be used to generate a unique machine_id on systems
> with a readonly rootfs. The two usecases require the SoC UID in different
> formats. While machine_id_set_hashable() takes a binary representation
> of the SoC UID, soc0.serial_number is a string. The conversion from the
> binary representation to the string is SoC specific, some SoCs interpret
> the binary data as a byte array (AM62x for example), others interpret it
> as words of different lengths in different endianesses (i.MX). Others
> even print the binary data as decimal (qcom).
> 
> Needing a SoC driver for providing the SoC UID is an unlucky choice as
> some SoCs do not have a SoC driver, but instead read the SoC UID in
> their eFuse driver in drivers/nvmem (STM32MP bsec). These drivers
> provide hashable data to generate a machine_id, but do not expose the
> SoC ID.
> 
> This patch introduces barebox_set_soc_uid(). This function provides a
> new environment variable global.soc_uid which contains the SoC UID.
> It also passes the SoC UID to machine_id_set_hashable() for generating a
> machine_id. To accomodate for different string representations of the
> binary data barebox_set_soc_uid() takes both the binary data and a
> string in the SoCs preferred format of the same data.
> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

I wonder if soc_uid is really the global variable we are looking for. I
understand what we want is a hardware-provided unique ID of a board.
However boards can have multiple or no SoC UIDs.

I assume a board with multiple SoCs can have a soc1.serial_number too,
then having all UIDs provided via the serial_number interface but only a
single soc_uid global seems confusing to me.

A SoC or SoM that provides no SoC UID may still provide means of unique
hardware identification and the global we are introducing here could
allow us to abstract away from this.

Can we name this something like hardware_uid to be more flexible about
its origin?

> ---
>   common/misc.c          | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++
>   include/barebox-info.h |  4 ++++
>   2 files changed, 62 insertions(+)
> 
> diff --git a/common/misc.c b/common/misc.c
> index 0af5a9cf30cdb952063974969c368061420a6e2b..ef6687f01389beaed44fc446b25ec5f21e712366 100644
> --- a/common/misc.c
> +++ b/common/misc.c
> @@ -16,6 +16,7 @@
>   #include <restart.h>
>   #include <poweroff.h>
>   #include <string.h>
> +#include <machine_id.h>
>   #include <linux/stringify.h>
>   
>   int errno;
> @@ -252,6 +253,63 @@ const char *barebox_get_serial_number(void)
>   
>   BAREBOX_MAGICVAR(global.serial_number, "Board serial number");
>   
> +static char *soc_uid_str;
> +static void *soc_uid;
> +static size_t soc_uid_len;
> +
> +/*
> + * barebox_set_soc_uid - set a Unique SoC ID
> + *
> + * Set a Unique SoC ID. The ID is usually read from SoC internal eFuses. It

"The UID" please

> + * can vary in length on different SoCs and can have different canonical hex
> + * representations. @uidstr can be NULL in which case uidbuf is interpreted
> + * as a byte array.
> + *
> + * barebox uses the SoC ID to generate a machine_id and exports it to the

SoC UID

> + * environment via global.soc_uid.
> + *
> + * In Linux the serial number is exported as /sys/devices/soc0/serial_number

"In Linux, the SoC UID is exported as /sys/devices/soc0/serial_number"?

> + * which should generally have the same format as *uidstr.
> + */
> +void barebox_set_soc_uid(const char *uidstr, const void *uidbuf, size_t len)
> +{
> +	if (soc_uid_str) {
> +		pr_warn("SoC UID already set. Ignoring\n");
> +		return;
> +	}
> +
> +	soc_uid = xmemdup(uidbuf, len);
> +	soc_uid_len = len;
> +
> +	if (uidstr) {
> +		soc_uid_str = xstrdup(uidstr);
> +	} else {
> +		soc_uid_str = xzalloc(len * 2 + 1);
> +		bin2hex(soc_uid_str, uidbuf, len);
> +	}
> +
> +	machine_id_set_hashable(uidbuf, len);
> +
> +	globalvar_add_simple_string("soc_uid", &soc_uid_str);
> +}
> +BAREBOX_MAGICVAR(global.soc_uid, "SoC Unique ID");
> +
> +const char *barebox_get_soc_uid(void)
> +{
> +	return soc_uid_str;
> +}
> +
> +int barebox_get_soc_uid_bin(const void **buf, size_t *len)
> +{
> +	if (!soc_uid)
> +		return -ENOENT;
> +
> +	*buf = soc_uid;
> +	*len = soc_uid_len;
> +
> +	return 0;
> +}
> +
>   #ifdef CONFIG_OFTREE
>   static char *of_machine_compatible;
>   
> diff --git a/include/barebox-info.h b/include/barebox-info.h
> index bcceb7b0e0211c8c7dccd6b9f480c9fbc13dcf63..898fb493b6348ee64670f928a3598a7c3d277554 100644
> --- a/include/barebox-info.h
> +++ b/include/barebox-info.h
> @@ -25,6 +25,10 @@ bool barebox_hostname_is_valid(const char *s);
>   const char *barebox_get_serial_number(void);
>   void barebox_set_serial_number(const char *);
>   
> +void barebox_set_soc_uid(const char *uidstr, const void *uidbuf, size_t len);
> +const char *barebox_get_soc_uid(void);
> +int barebox_get_soc_uid_bin(const void **buf, size_t *len);
> +
>   #ifdef CONFIG_OFTREE
>   void barebox_set_of_machine_compatible(const char *);
>   const char *barebox_get_of_machine_compatible(void);
> 

Regards,
Jonas

-- 
Pengutronix e.K.                           | Jonas Rebmann               |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-9    |



^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit
  2025-11-17  9:59   ` Jonas Rebmann
@ 2025-11-17 11:02     ` Sascha Hauer
  0 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17 11:02 UTC (permalink / raw)
  To: Jonas Rebmann; +Cc: BAREBOX

On Mon, Nov 17, 2025 at 10:59:56AM +0100, Jonas Rebmann wrote:
> Hi Sascha,
> 
> On 2025-11-17 09:35, Sascha Hauer wrote:
> > On i.MX8MP the SoC ID has 128 bits instead of 64 bits as on other i.MX8M
> > SoCs. Read the remaining 64 bits which so far haven't been included in
> > the SoC ID.
> > 
> > On already rolled out devices a change of the SoC ID is undesired, so
> > this commit introduces CONFIG_ARCH_IMX8MP_KEEP_COMPATIBLE_SOC_UID. With
> > this option enabled the old SoC ID will be used.
> 
> I think we should avoid using the terms SoC ID and SoC UID
> interchangeably. Apparently some (TI) refer to SoC part numbers as SoC
> IDs, which I find confusing enough by itself.

Right. I'll look through the series and replace the remaining
occurences of SoC ID with SoC UID.

Sascha

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 1/9] introduce SoC UID
  2025-11-17 10:16   ` Jonas Rebmann
@ 2025-11-17 11:28     ` Sascha Hauer
  0 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2025-11-17 11:28 UTC (permalink / raw)
  To: Jonas Rebmann; +Cc: BAREBOX

On Mon, Nov 17, 2025 at 11:16:34AM +0100, Jonas Rebmann wrote:
> Hi Sascha,
> 
> On 2025-11-17 09:35, Sascha Hauer wrote:
> > Most SoCs have a unique ID (UID) which can be used to identify a
> > particular SoC instance. This is exposed to the environment by some SoC
> > drivers as soc0.serial_number like also done in Linux. The SoC UID can
> > also conveniently be used to generate a unique machine_id on systems
> > with a readonly rootfs. The two usecases require the SoC UID in different
> > formats. While machine_id_set_hashable() takes a binary representation
> > of the SoC UID, soc0.serial_number is a string. The conversion from the
> > binary representation to the string is SoC specific, some SoCs interpret
> > the binary data as a byte array (AM62x for example), others interpret it
> > as words of different lengths in different endianesses (i.MX). Others
> > even print the binary data as decimal (qcom).
> > 
> > Needing a SoC driver for providing the SoC UID is an unlucky choice as
> > some SoCs do not have a SoC driver, but instead read the SoC UID in
> > their eFuse driver in drivers/nvmem (STM32MP bsec). These drivers
> > provide hashable data to generate a machine_id, but do not expose the
> > SoC ID.
> > 
> > This patch introduces barebox_set_soc_uid(). This function provides a
> > new environment variable global.soc_uid which contains the SoC UID.
> > It also passes the SoC UID to machine_id_set_hashable() for generating a
> > machine_id. To accomodate for different string representations of the
> > binary data barebox_set_soc_uid() takes both the binary data and a
> > string in the SoCs preferred format of the same data.
> > 
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> 
> I wonder if soc_uid is really the global variable we are looking for. I
> understand what we want is a hardware-provided unique ID of a board.
> However boards can have multiple or no SoC UIDs.
> 
> I assume a board with multiple SoCs can have a soc1.serial_number too,
> then having all UIDs provided via the serial_number interface but only a
> single soc_uid global seems confusing to me.
> 
> A SoC or SoM that provides no SoC UID may still provide means of unique
> hardware identification and the global we are introducing here could
> allow us to abstract away from this.
> 
> Can we name this something like hardware_uid to be more flexible about
> its origin?

Right now this is a SoC UID, so I would prefer calling like that.

If a board has zero SoC UIDs, then don't set this variable. I assume
barebox can only run on one SoC at a time and on a board with multiple
SoCs we have multiple barebox instances running with each having its own
SoC UID.

If your SoC doesn't provide a SoC UID then I would recommend not to
overload global.soc_uid with your board specific UID, but provide a
different variable instead.

Currently the last caller of machine_id_set_hashable() wins. I thought
about:

1) Pass some priority to machine_id_set_hashable() and use the data with
   the highest priority
2) Generate a systemd machine_id from all buffers
   machine_id_set_hashable() is called with (in some specific order,
   maybe sort by buffer size first and by memcmp() should multiple
   buffers have the same size)

All these approaches have the problem that the machine_id might change
when new machine_id_set_hashable() providers are added to a new barebox
version.

Sascha

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^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2025-11-17 11:28 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2025-11-17  8:35 [PATCH v2 0/9] Unify SoC UID and machine hashable data Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 1/9] introduce SoC UID Sascha Hauer
2025-11-17 10:16   ` Jonas Rebmann
2025-11-17 11:28     ` Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 2/9] soc: imx8mp: Soc ID is 128bit Sascha Hauer
2025-11-17  9:59   ` Jonas Rebmann
2025-11-17 11:02     ` Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 3/9] ARM: i.MX6: print leading zero for SoC ID Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 4/9] nvmem: bsec: call barebox_set_soc_uid() Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 5/9] nvmem: imx-ocotp-ele: " Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 6/9] nvmem: ocotp: Fix SoC ID reading for i.MX8MP Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 7/9] nvmem: imx-ocotp: call barebox_set_soc_uid() Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 8/9] soc: imx8m: register SoC UID Sascha Hauer
2025-11-17  8:35 ` [PATCH v2 9/9] Documentation: migration: add i.MX8MP SoC UID change note Sascha Hauer

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