From: Sohaib Mohamed <sohaib.amhmd@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>,
Ahmad Fatoum <a.fatoum@pengutronix.de>,
Sohaib Mohamed <sohaib.amhmd@gmail.com>,
BAREBOX <barebox@lists.infradead.org>
Subject: [PATCH 07/14] pmdomain: rockchip: Add RK3562 power domain support
Date: Fri, 16 Jan 2026 20:40:41 +0100 [thread overview]
Message-ID: <20260116-barebox-kickpi-v1-7-d11fbccd527a@gmail.com> (raw)
In-Reply-To: <20260116-barebox-kickpi-v1-0-d11fbccd527a@gmail.com>
Add basic power domain controller support for RK3562 SoC including
GPU, NPU, VDPU, VEPU, RGA, VI, VO, and PHP domains with clock gating
configurations.
Note: This implementation does not handle nested power domain
hierarchies if present on this SoC.
Signed-off-by: Sohaib Mohamed <sohaib.amhmd@gmail.com>
---
drivers/pmdomain/rockchip/pm-domains.c | 47 ++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
index a30ff8fb22..4916515f27 100644
--- a/drivers/pmdomain/rockchip/pm-domains.c
+++ b/drivers/pmdomain/rockchip/pm-domains.c
@@ -32,6 +32,7 @@
#include <dt-bindings/power/rk3399-power.h>
#include <dt-bindings/power/rk3568-power.h>
#include <dt-bindings/power/rockchip,rk3576-power.h>
+#include <dt-bindings/power/rockchip,rk3562-power.h>
#include <dt-bindings/power/rk3588-power.h>
#define readx_poll_timeout_atomic(op, addr, val, cond, poll_time, timeout_us) \
@@ -133,6 +134,21 @@ struct rockchip_pmu {
.active_wakeup = wakeup, \
}
+#define DOMAIN_M_G_SD(_name, pwr, status, req, idle, ack, g_mask, mem, wakeup, keepon) \
+{ \
+ .name = _name, \
+ .pwr_w_mask = (pwr) << 16, \
+ .pwr_mask = (pwr), \
+ .status_mask = (status), \
+ .req_w_mask = (req) << 16, \
+ .req_mask = (req), \
+ .idle_mask = (idle), \
+ .ack_mask = (ack), \
+ .clk_ungate_mask = (g_mask), \
+ .active_wakeup = wakeup, \
+}
+
+
#define DOMAIN_M_O_R(_name, p_offset, pwr, status, m_offset, m_status, r_status, r_offset, req, idle, ack, wakeup, regulator) \
{ \
.name = _name, \
@@ -202,6 +218,9 @@ struct rockchip_pmu {
#define DOMAIN_RK3568(name, pwr, req, wakeup) \
DOMAIN_M(name, pwr, pwr, req, req, req, wakeup)
+#define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup) \
+ DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false)
+
#define DOMAIN_RK3576(name, p_offset, pwr, status, r_status, r_offset, req, idle, g_mask, wakeup) \
DOMAIN_M_O_R_G(name, p_offset, pwr, status, 0, r_status, r_status, r_offset, req, idle, idle, g_mask, wakeup)
@@ -1099,6 +1118,18 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
[RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true),
};
+static const struct rockchip_domain_info rk3562_pm_domains[] = {
+ /* name pwr req g_mask mem wakeup */
+ [RK3562_PD_GPU] = DOMAIN_RK3562("gpu", BIT(0), BIT(1), BIT(1), 0, false),
+ [RK3562_PD_NPU] = DOMAIN_RK3562("npu", BIT(1), BIT(2), BIT(2), 0, false),
+ [RK3562_PD_VDPU] = DOMAIN_RK3562("vdpu", BIT(2), BIT(6), BIT(6), 0, false),
+ [RK3562_PD_VEPU] = DOMAIN_RK3562("vepu", BIT(3), BIT(7), BIT(7) | BIT(3), 0, false),
+ [RK3562_PD_RGA] = DOMAIN_RK3562("rga", BIT(4), BIT(5), BIT(5) | BIT(4), 0, false),
+ [RK3562_PD_VI] = DOMAIN_RK3562("vi", BIT(5), BIT(3), BIT(3), 0, false),
+ [RK3562_PD_VO] = DOMAIN_RK3562("vo", BIT(6), BIT(4), BIT(4), 16, false),
+ [RK3562_PD_PHP] = DOMAIN_RK3562("php", BIT(7), BIT(8), BIT(8), 0, false),
+};
+
static const struct rockchip_domain_info rk3568_pm_domains[] = {
[RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false),
[RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false),
@@ -1300,6 +1331,18 @@ static const struct rockchip_pmu_info rk3399_pmu = {
.domain_info = rk3399_pm_domains,
};
+static const struct rockchip_pmu_info rk3562_pmu = {
+ .pwr_offset = 0x210,
+ .status_offset = 0x230,
+ .req_offset = 0x110,
+ .idle_offset = 0x128,
+ .ack_offset = 0x120,
+ .clk_ungate_offset = 0x140,
+
+ .num_domains = ARRAY_SIZE(rk3562_pm_domains),
+ .domain_info = rk3562_pm_domains,
+};
+
static const struct rockchip_pmu_info rk3568_pmu = {
.pwr_offset = 0xa0,
.status_offset = 0x98,
@@ -1390,6 +1433,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
.compatible = "rockchip,rk3366-power-controller",
.data = (void *)&rk3366_pmu,
},
+ {
+ .compatible = "rockchip,rk3562-power-controller",
+ .data = (void *)&rk3562_pmu,
+ },
{
.compatible = "rockchip,rk3368-power-controller",
.data = (void *)&rk3368_pmu,
--
2.43.0
next prev parent reply other threads:[~2026-01-16 19:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-16 19:40 [PATCH 00/14] Initial support for Rockchip RK3562 Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 01/14] ARM: rockchip: Add initial RK3562 SoC support Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 02/14] clk: rockchip: add RK3562 clock and reset driver support Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 03/14] pinctrl: rockchip: sync driver with Linux Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 04/14] ARM: boards: Rockchip: add RK3562-EVB2 support Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 05/14] ARM: boards: Rockchip: Add device tree for kickpi k3 board Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 06/14] ARM: rockchip: Add RK3562 KickPi K3 board support Sohaib Mohamed
2026-01-16 19:40 ` Sohaib Mohamed [this message]
2026-01-16 19:40 ` [PATCH 08/14] aiodev: rockchip_saradc: Add RK3562 support Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 09/14] phy: rockchip-inno-usb2: Add support for RK3562 PHY Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 10/14] rockchip-rng: Add RK3562 support Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 11/14] mci: sdhci: rockchip-dwcmshc: " Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 12/14] nvmem: rockchip-otp: " Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 13/14] phy: rockchip: inno-dsidphy: " Sohaib Mohamed
2026-01-16 19:40 ` [PATCH 14/14] phy: rockchip: naneng-combphy: " Sohaib Mohamed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260116-barebox-kickpi-v1-7-d11fbccd527a@gmail.com \
--to=sohaib.amhmd@gmail.com \
--cc=a.fatoum@pengutronix.de \
--cc=barebox@lists.infradead.org \
--cc=s.hauer@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox