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From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>
Cc: "Claude Sonnet 4.5" <noreply@anthropic.com>,
	Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH v5 14/22] ARM: drop arm_fixup_vectors()
Date: Fri, 16 Jan 2026 09:12:25 +0100	[thread overview]
Message-ID: <20260116-pbl-load-elf-v5-14-51d042021c5a@pengutronix.de> (raw)
In-Reply-To: <20260116-pbl-load-elf-v5-0-51d042021c5a@pengutronix.de>

Add the missing "ax" flag for the exception table. With this the jumps
in the exception table are correctly relocated and we no longer have to
fix them up during runtime. Remove the now unnecessary
arm_fixup_vectors().

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/exceptions_32.S       | 54 +++++---------------------------------
 arch/arm/cpu/interrupts_32.c       |  5 +---
 arch/arm/cpu/mmu_32.c              |  2 --
 arch/arm/cpu/no-mmu.c              |  2 --
 arch/arm/include/asm/barebox-arm.h |  4 ---
 5 files changed, 8 insertions(+), 59 deletions(-)

diff --git a/arch/arm/cpu/exceptions_32.S b/arch/arm/cpu/exceptions_32.S
index dc3d42663c..68eb696fc7 100644
--- a/arch/arm/cpu/exceptions_32.S
+++ b/arch/arm/cpu/exceptions_32.S
@@ -127,58 +127,18 @@ fiq:
 	bad_save_user_regs
 	bl 	do_fiq
 
-#ifdef CONFIG_ARM_EXCEPTIONS
-/*
- * With relocatable binary support the runtime exception vectors do not match
- * the addresses in the binary. We have to fix them up during runtime
- */
-ENTRY(arm_fixup_vectors)
-	ldr	r0, =undefined_instruction
-	ldr	r1, =_undefined_instruction
-	str	r0, [r1]
-	ldr	r0, =software_interrupt
-	ldr	r1, =_software_interrupt
-	str	r0, [r1]
-	ldr	r0, =prefetch_abort
-	ldr	r1, =_prefetch_abort
-	str	r0, [r1]
-	ldr	r0, =data_abort
-	ldr	r1, =_data_abort
-	str	r0, [r1]
-	ldr	r0, =irq
-	ldr	r1, =_irq
-	str	r0, [r1]
-	ldr	r0, =fiq
-	ldr	r1, =_fiq
-	str	r0, [r1]
-	bx	lr
-ENDPROC(arm_fixup_vectors)
-#endif
-
-.section .text_exceptions
+.section .text_exceptions, "ax"
 .globl extable
 extable:
 1:	b 1b				/* barebox_arm_reset_vector */
 #ifdef CONFIG_ARM_EXCEPTIONS
-	ldr pc, _undefined_instruction	/* undefined instruction */
-	ldr pc, _software_interrupt	/* software interrupt (SWI) */
-	ldr pc, _prefetch_abort		/* prefetch abort */
-	ldr pc, _data_abort		/* data abort */
+	ldr pc, =undefined_instruction	/* undefined instruction */
+	ldr pc, =software_interrupt	/* software interrupt (SWI) */
+	ldr pc, =prefetch_abort		/* prefetch abort */
+	ldr pc, =data_abort		/* data abort */
 1:	b 1b				/* (reserved) */
-	ldr pc, _irq			/* irq (interrupt) */
-	ldr pc, _fiq			/* fiq (fast interrupt) */
-.globl _undefined_instruction
-_undefined_instruction: .word undefined_instruction
-.globl _software_interrupt
-_software_interrupt: .word software_interrupt
-.globl _prefetch_abort
-_prefetch_abort: .word prefetch_abort
-.globl _data_abort
-_data_abort: .word data_abort
-.globl _irq
-_irq: .word irq
-.globl _fiq
-_fiq: .word fiq
+	ldr pc, =irq			/* irq (interrupt) */
+	ldr pc, =fiq			/* fiq (fast interrupt) */
 #else
 1:	b 1b				/* undefined instruction */
 1:	b 1b				/* software interrupt (SWI) */
diff --git a/arch/arm/cpu/interrupts_32.c b/arch/arm/cpu/interrupts_32.c
index 0b88db10fe..af2231f2a7 100644
--- a/arch/arm/cpu/interrupts_32.c
+++ b/arch/arm/cpu/interrupts_32.c
@@ -231,10 +231,8 @@ static __maybe_unused int arm_init_vectors(void)
 	 * First try to use the vectors where they actually are, works
 	 * on ARMv7 and later.
 	 */
-	if (!set_vector_table((unsigned long)__exceptions_start)) {
-		arm_fixup_vectors();
+	if (!set_vector_table((unsigned long)__exceptions_start))
 		return 0;
-	}
 
 	/*
 	 * Next try high vectors at 0xffff0000.
@@ -265,6 +263,5 @@ void arm_pbl_init_exceptions(void)
 		return;
 
 	set_vbar((unsigned long)__exceptions_start);
-	arm_fixup_vectors();
 }
 #endif
diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
index eee1385a8f..eae5a878e8 100644
--- a/arch/arm/cpu/mmu_32.c
+++ b/arch/arm/cpu/mmu_32.c
@@ -528,8 +528,6 @@ void create_vector_table(unsigned long adr)
 			      get_pte_flags(MAP_CACHED), true);
 	}
 
-	arm_fixup_vectors();
-
 	memset(vectors, 0, PAGE_SIZE);
 	memcpy(vectors, __exceptions_start, __exceptions_stop - __exceptions_start);
 }
diff --git a/arch/arm/cpu/no-mmu.c b/arch/arm/cpu/no-mmu.c
index c4ef5d1f9d..8e00cffebf 100644
--- a/arch/arm/cpu/no-mmu.c
+++ b/arch/arm/cpu/no-mmu.c
@@ -58,8 +58,6 @@ static int nommu_v7_vectors_init(void)
 	cr &= ~CR_V;
 	set_cr(cr);
 
-	arm_fixup_vectors();
-
 	vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
 	memset(vectors, 0, PAGE_SIZE);
 	memcpy(vectors, __exceptions_start, __exceptions_size);
diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h
index e1d89d5684..99f8231194 100644
--- a/arch/arm/include/asm/barebox-arm.h
+++ b/arch/arm/include/asm/barebox-arm.h
@@ -45,12 +45,8 @@ unsigned long arm_mem_membase_get(void);
 unsigned long arm_mem_endmem_get(void);
 
 #ifdef CONFIG_ARM_EXCEPTIONS
-void arm_fixup_vectors(void);
 ulong arm_get_vector_table(void);
 #else
-static inline void arm_fixup_vectors(void)
-{
-}
 static inline ulong arm_get_vector_table(void)
 {
 	return ~0;

-- 
2.47.3




  parent reply	other threads:[~2026-01-16  8:35 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-16  8:12 [PATCH v5 00/22] PBL: Add PBL ELF loading support with dynamic relocations Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 01/22] Makefile.compiler: add objcopy-option Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 02/22] elf: only accept images matching the native ELF_CLASS Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 03/22] elf: build for PBL as well Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 04/22] elf: add elf segment iterator Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 05/22] elf: add dynamic relocation support Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 06/22] ARM: implement elf_apply_relocations() for ELF " Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 07/22] riscv: define generic relocate_image Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 08/22] riscv: implement elf_apply_relocations() for ELF relocation support Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 09/22] elf: implement elf_load_inplace() Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 10/22] elf: create elf_open_binary_into() Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 11/22] Makefile: add vmbarebox build target Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 12/22] PBL: allow to link ELF image into PBL Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 13/22] mmu: add MAP_CACHED_RO mapping type Sascha Hauer
2026-01-16  8:12 ` Sascha Hauer [this message]
2026-01-16  8:12 ` [PATCH v5 15/22] ARM: linker script: create separate PT_LOAD segments for text, rodata, and data Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 16/22] ARM: link ELF image into PBL Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 17/22] ARM: cleanup barebox proper entry Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 18/22] ARM: PBL: setup MMU with proper permissions from ELF segments Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 19/22] riscv: linker script: create separate PT_LOAD segments for text, rodata, and data Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 20/22] riscv: link ELF image into PBL Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 21/22] riscv: Allwinner D1: Drop M-Mode Sascha Hauer
2026-01-16  8:12 ` [PATCH v5 22/22] riscv: add ELF segment-based memory protection with MMU Sascha Hauer
2026-01-19 12:23 ` [PATCH v5 00/22] PBL: Add PBL ELF loading support with dynamic relocations Sascha Hauer

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