[PATCH v3 06/14] ARM: i.MX: scratch: add FDT support

[Marco Felsch <m.felsch@pengutronix.de>]

Add support to store a FDT within the scratch area. The user needs to
query the location and size via imx_scratch_get_fdt() which can be used
afterwards to write the actual FDT into it.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 arch/arm/mach-imx/scratch.c         | 44 ++++++++++++++++++++++++++++++++++---
 include/asm-generic/memory_layout.h |  6 +++++
 include/mach/imx/scratch.h          |  2 ++
 security/Kconfig                    | 15 +++++++++++++
 4 files changed, 64 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/scratch.c b/arch/arm/mach-imx/scratch.c
index e4e2d25969f061c9fcdfd7c3d87701b715eb2805..fba4b41040a500e31dc4afae2cdcafed0763af6b 100644
--- a/arch/arm/mach-imx/scratch.c
+++ b/arch/arm/mach-imx/scratch.c
@@ -13,10 +13,22 @@
 #include <pbl.h>
 
 struct imx_scratch_space {
-	u32 bootrom_log[128];
-	u32 reserved[128];		/* reserve for bootrom log */
-	struct optee_header optee_hdr;
+	union {
+		/* Internal buffer, never use directly! */
+		u8 __buf[CONFIG_SCRATCH_SIZE];
+		struct {
+			u32 bootrom_log[128];
+			/* reserve for bootrom log */
+			u32 reserved[128];
+			struct optee_header optee_hdr;
+			/* FDT needs an 8 byte alignment, always last element! */
+			u8 fdt[] __aligned(8);
+		};
+	};
 };
+/* Ensure that 'fdt' size fits into OP-TEE DTB_MAX_SIZE size */
+static_assert(sizeof(struct imx_scratch_space) -
+	      offsetof(struct imx_scratch_space, fdt) >= PBL_OPTEE_DTB_MAX_SIZE);
 
 static struct imx_scratch_space *scratch;
 
@@ -92,3 +104,29 @@ const struct optee_header *imx_scratch_get_optee_hdr(void)
 
 	return &scratch->optee_hdr;
 }
+
+u8 *imx_scratch_get_fdt(unsigned int *fdt_sz)
+{
+	unsigned int sz;
+
+	if (!scratch) {
+		if (IN_PBL)
+			return ERR_PTR(-EINVAL);
+		else
+			scratch = (void *)arm_mem_scratch_get();
+	}
+
+	if (PBL_OPTEE_DTB_MAX_SIZE == 0)
+		return NULL;
+
+	sz = sizeof(struct imx_scratch_space) -
+	     offsetof(struct imx_scratch_space, fdt);
+
+	if (sz > PBL_OPTEE_DTB_MAX_SIZE)
+		sz = PBL_OPTEE_DTB_MAX_SIZE;
+
+	if (fdt_sz)
+		*fdt_sz = sz;
+
+	return scratch->fdt;
+}
diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h
index 39af73849796fd1954521f0b53bf38fcb0984cef..d477f7bbdbf769a61392da06f2a7b665ce86f5ca 100644
--- a/include/asm-generic/memory_layout.h
+++ b/include/asm-generic/memory_layout.h
@@ -25,6 +25,12 @@
 #define OPTEE_SHM_SIZE 0
 #endif
 
+#ifdef CONFIG_PBL_OPTEE_DTB_MAX_SIZE
+#define PBL_OPTEE_DTB_MAX_SIZE CONFIG_PBL_OPTEE_DTB_MAX_SIZE
+#else
+#define PBL_OPTEE_DTB_MAX_SIZE 0
+#endif
+
 #define HEAD_TEXT_BASE MALLOC_BASE
 #define MALLOC_SIZE CONFIG_MALLOC_SIZE
 #define STACK_SIZE  CONFIG_STACK_SIZE
diff --git a/include/mach/imx/scratch.h b/include/mach/imx/scratch.h
index 6c2cecabcd80f71aa754736322151d63f2711745..b74d19a560f33da0a11621af7e11abdce6d1c295 100644
--- a/include/mach/imx/scratch.h
+++ b/include/mach/imx/scratch.h
@@ -14,6 +14,8 @@ struct optee_header;
 const struct optee_header *imx_scratch_get_optee_hdr(void);
 void imx_scratch_save_optee_hdr(const struct optee_header *hdr);
 
+u8 *imx_scratch_get_fdt(unsigned int *fdt_sz);
+
 #define imx8mq_init_scratch_space() imx8m_init_scratch_space(32, true)
 #define imx8mm_init_scratch_space() imx8m_init_scratch_space(32, true)
 #define imx8mn_init_scratch_space() imx8m_init_scratch_space(16, true)
diff --git a/security/Kconfig b/security/Kconfig
index 40d468ae07d2b1d4357542df88a0a92eeb3d365f..338bc1e5a72d91bc1617865cacd9d2d8941ca8f5 100644
--- a/security/Kconfig
+++ b/security/Kconfig
@@ -178,6 +178,21 @@ config PBL_OPTEE
 	  to barebox in THUMB2 mode. Make sure you do not compile barebox in THUMB2
 	  mode for OP-TEE versions older than this.
 
+config PBL_OPTEE_DTB_MAX_SIZE
+	hex
+	default 0x0
+	prompt "OP-TEE FDT Size"
+	help
+	  The size of the DTB which is passed by the PBL to OP-TEE. This option
+	  can be left unchanged if OP-TEE DTB support isn't required. If OP-TEE
+	  DTB support is used, this option must match OP-TEE's CFG_DTB_MAX_SIZE
+	  configuration.
+
+	  Note: passing the DTB from the PBL to OP-TEE requires platform
+	  support. Currently only the i.MX8MMini/Nano/Plus SoCs support this.
+	  Furthermore your board code must be modified to pass the FDT
+	  accordingly.
+
 endmenu
 
 source "lib/Kconfig.hardening"

-- 
2.47.3