[PATCH] ARM: rockchip: RK3562: Add reset reason detection

[PATCH] ARM: rockchip: RK3562: Add reset reason detection

[Robin van der Gracht]

Reset reason detection on the RK3562 (and some other Rochchip models)
only works if the TSACD_SHUT_M0 pin hasn't been connected to the nPOR
pin (as is suggested by the hardware design guide). In that case all
soft resets become POR.

Signed-off-by: Robin van der Gracht <robin.van.der.gracht@protonic.nl>
---
 arch/arm/mach-rockchip/rk3562.c     | 34 +++++++++++++++++++++++++++++
 include/mach/rockchip/rk3562-regs.h |  1 +
 2 files changed, 35 insertions(+)

diff --git a/arch/arm/mach-rockchip/rk3562.c b/arch/arm/mach-rockchip/rk3562.c
index 9ab5b82695..2dde1e94ff 100644
--- a/arch/arm/mach-rockchip/rk3562.c
+++ b/arch/arm/mach-rockchip/rk3562.c
@@ -2,6 +2,7 @@
 #include <common.h>
 #include <io.h>
 #include <bootsource.h>
+#include <reset_source.h>
 #include <mach/rockchip/rk3562-regs.h>
 #include <mach/rockchip/rockchip.h>
 #include <asm/barebox-arm-head.h>
@@ -12,9 +13,42 @@ void rk3562_lowlevel_init(void)
 	arm_cpu_lowlevel_init();
 }
 
+static void rk3562_detect_reset_reason(void)
+{
+	u32 val = readl(RK3562_CRU_BASE + 0x0620);
+
+	switch (val) {
+	case 0:
+		reset_source_set(RESET_POR);
+		break;
+	case (1 << 0):
+	case (1 << 1):
+		reset_source_set(RESET_RST);
+		break;
+	case (1 << 2):
+	case (1 << 3):
+		reset_source_set(RESET_THERM);
+		break;
+	case (1 << 4):
+	case (1 << 5):
+		reset_source_set(RESET_WDG);
+		break;
+	default:
+		reset_source_set(RESET_UKWN);
+		break;
+	}
+
+	/*
+	 * Clear the reset status register here so current reset status bit
+	 * doesn't interfere with the check on the next boot.
+	 */
+	writel(0, RK3562_CRU_BASE + 0x0620);
+}
+
 int rk3562_init(void)
 {
 	rockchip_parse_bootrom_iram(rockchip_scratch_space()->iram);
+	rk3562_detect_reset_reason();
 
 	return 0;
 }
diff --git a/include/mach/rockchip/rk3562-regs.h b/include/mach/rockchip/rk3562-regs.h
index e0a06e6427..7049a37c58 100644
--- a/include/mach/rockchip/rk3562-regs.h
+++ b/include/mach/rockchip/rk3562-regs.h
@@ -17,5 +17,6 @@
 
 #define RK3562_IRAM_BASE	0xfe480000
 #define RK3562_PMUGRF_BASE	0xff010000
+#define RK3562_CRU_BASE		0xff100000
 
 #endif /* __MACH_RK3562_REGS_H */
-- 
2.43.0