[PATCH v2 0/3] ARM: socfpga: Enclustra SA2: enable HS USB

[PATCH v2 0/3] ARM: socfpga: Enclustra SA2: enable HS USB

[David Picard]

Enable high-speed USB on Enclustra Mercury+ SA2 module:
- Enable options in the defconfig.
- Enable the high-speed USB 2.0 controller in the devicetree.
- Change 1st stage image compression method to keep it small enough.

Signed-off-by: David Picard <david.picard@clermont.in2p3.fr>
---
David Picard (3):
      ARM: socfpga: Enclustra SA2: add defconfig options
      ARM: socfpga: Enclustra SA2: enable USB1 HS
      ARM: socfpga: xload: compress image with xz

 arch/arm/configs/socfpga-xload_defconfig       |  1 +
 arch/arm/configs/socfpga_defconfig             | 15 +++++++++++++++
 arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi |  7 +++++++
 3 files changed, 23 insertions(+)
---
base-commit: f6fe200a9862010fb5bc5cc5d55abe2350b5aa82
change-id: 20260304-b4-sa2-usb-8d413bd5c768

Best regards,
-- 
David Picard <david.picard@clermont.in2p3.fr>

[PATCH v2 1/3] ARM: socfpga: Enclustra SA2: add defconfig options

[David Picard]

Add configuration options needed by the Enclustra SA2 module.
---
 arch/arm/configs/socfpga_defconfig | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index e9b93bc197..37555a6297 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -60,6 +60,7 @@ CONFIG_CMD_MM=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DETECT=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
@@ -76,6 +77,9 @@ CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_OF_BAREBOX_ENV_IN_FS=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_NET_DESIGNWARE_SOCFPGA=y
+CONFIG_MICREL_PHY=y
+CONFIG_I2C=y
+CONFIG_I2C_DESIGNWARE=y
 CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_MTD_NAND_DENALI=y
@@ -93,7 +97,12 @@ CONFIG_KEYBOARD_GPIO=y
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_DW=y
 CONFIG_GPIO_DESIGNWARE=y
+CONFIG_NVMEM=y
+CONFIG_NVMEM_ATMEL_SHA204A=y
 CONFIG_FIRMWARE_ALTERA_SOCFPGA=y
+CONFIG_FPGA=y
+CONFIG_FPGA_BRIDGE=y
+CONFIG_SOCFPGA_FPGA_BRIDGE=y
 CONFIG_FS_EXT4=y
 CONFIG_FS_TFTP=y
 CONFIG_FS_NFS=y

-- 
2.43.0

Re: [PATCH v2 1/3] ARM: socfpga: Enclustra SA2: add defconfig options

[Ahmad Fatoum]

On 3/5/26 10:55 AM, David Picard wrote:
> Add configuration options needed by the Enclustra SA2 module.

With Signed-off-by added:

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

> ---
>  arch/arm/configs/socfpga_defconfig | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
> index e9b93bc197..37555a6297 100644
> --- a/arch/arm/configs/socfpga_defconfig
> +++ b/arch/arm/configs/socfpga_defconfig
> @@ -60,6 +60,7 @@ CONFIG_CMD_MM=y
>  CONFIG_CMD_CLK=y
>  CONFIG_CMD_DETECT=y
>  CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
>  CONFIG_CMD_LED=y
>  CONFIG_CMD_SPI=y
>  CONFIG_CMD_LED_TRIGGER=y
> @@ -76,6 +77,9 @@ CONFIG_OF_BAREBOX_DRIVERS=y
>  CONFIG_OF_BAREBOX_ENV_IN_FS=y
>  CONFIG_DRIVER_SERIAL_NS16550=y
>  CONFIG_DRIVER_NET_DESIGNWARE_SOCFPGA=y
> +CONFIG_MICREL_PHY=y
> +CONFIG_I2C=y
> +CONFIG_I2C_DESIGNWARE=y
>  CONFIG_MTD=y
>  CONFIG_NAND=y
>  CONFIG_MTD_NAND_DENALI=y
> @@ -93,7 +97,12 @@ CONFIG_KEYBOARD_GPIO=y
>  CONFIG_WATCHDOG=y
>  CONFIG_WATCHDOG_DW=y
>  CONFIG_GPIO_DESIGNWARE=y
> +CONFIG_NVMEM=y
> +CONFIG_NVMEM_ATMEL_SHA204A=y
>  CONFIG_FIRMWARE_ALTERA_SOCFPGA=y
> +CONFIG_FPGA=y
> +CONFIG_FPGA_BRIDGE=y
> +CONFIG_SOCFPGA_FPGA_BRIDGE=y
>  CONFIG_FS_EXT4=y
>  CONFIG_FS_TFTP=y
>  CONFIG_FS_NFS=y
> 

-- 
Pengutronix e.K.                  |                             |
Steuerwalder Str. 21              | http://www.pengutronix.de/  |
31137 Hildesheim, Germany         | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686  | Fax:   +49-5121-206917-5555 |

[PATCH v2 2/3] ARM: socfpga: Enclustra SA2: enable USB1 HS

[David Picard]

Enable high-speed USB 2.0 USB1 controller on Enclustra
Mercury+ SA2 module.
---
 arch/arm/configs/socfpga_defconfig             | 6 ++++++
 arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi | 7 +++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index 37555a6297..8f9e34d459 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -86,6 +86,10 @@ CONFIG_MTD_NAND_DENALI=y
 CONFIG_MTD_NAND_DENALI_DT=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_SPI_CADENCE_QUADSPI=y
+CONFIG_USB_HOST=y
+CONFIG_USB_DWC2_HOST=y
+CONFIG_USB_EHCI=y
+CONFIG_USB_ULPI=y
 CONFIG_MCI=y
 CONFIG_MCI_DW=y
 CONFIG_LED=y
@@ -103,6 +107,8 @@ CONFIG_FIRMWARE_ALTERA_SOCFPGA=y
 CONFIG_FPGA=y
 CONFIG_FPGA_BRIDGE=y
 CONFIG_SOCFPGA_FPGA_BRIDGE=y
+CONFIG_GENERIC_PHY=y
+CONFIG_USB_NOP_XCEIV=y
 CONFIG_FS_EXT4=y
 CONFIG_FS_TFTP=y
 CONFIG_FS_NFS=y
diff --git a/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi
index 6334573a77..cd33b38d2b 100644
--- a/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi
@@ -8,6 +8,7 @@
  */
 
 #include <arm/intel/socfpga/socfpga_cyclone5.dtsi>
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	barebox,deep-probe;
@@ -205,6 +206,12 @@ Reference:
 	};
 };
 
+&usbphy0 {
+	/* HPS_GPIO0, active low */
+	reset-gpios = <&porta 0 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
 &usb1 {
 	status = "okay";
 	dr_mode = "host";

-- 
2.43.0

Re: [PATCH v2 2/3] ARM: socfpga: Enclustra SA2: enable USB1 HS

[Ahmad Fatoum]

On 3/5/26 10:55 AM, David Picard wrote:
> Enable high-speed USB 2.0 USB1 controller on Enclustra
> Mercury+ SA2 module.

With Signed-off-by added:

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

> ---
>  arch/arm/configs/socfpga_defconfig             | 6 ++++++
>  arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi | 7 +++++++
>  2 files changed, 13 insertions(+)
> 
> diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
> index 37555a6297..8f9e34d459 100644
> --- a/arch/arm/configs/socfpga_defconfig
> +++ b/arch/arm/configs/socfpga_defconfig
> @@ -86,6 +86,10 @@ CONFIG_MTD_NAND_DENALI=y
>  CONFIG_MTD_NAND_DENALI_DT=y
>  CONFIG_MTD_SPI_NOR=y
>  CONFIG_SPI_CADENCE_QUADSPI=y
> +CONFIG_USB_HOST=y
> +CONFIG_USB_DWC2_HOST=y
> +CONFIG_USB_EHCI=y
> +CONFIG_USB_ULPI=y
>  CONFIG_MCI=y
>  CONFIG_MCI_DW=y
>  CONFIG_LED=y
> @@ -103,6 +107,8 @@ CONFIG_FIRMWARE_ALTERA_SOCFPGA=y
>  CONFIG_FPGA=y
>  CONFIG_FPGA_BRIDGE=y
>  CONFIG_SOCFPGA_FPGA_BRIDGE=y
> +CONFIG_GENERIC_PHY=y
> +CONFIG_USB_NOP_XCEIV=y
>  CONFIG_FS_EXT4=y
>  CONFIG_FS_TFTP=y
>  CONFIG_FS_NFS=y
> diff --git a/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi
> index 6334573a77..cd33b38d2b 100644
> --- a/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi
> +++ b/arch/arm/dts/socfpga_cyclone5_mercury_sa2.dtsi
> @@ -8,6 +8,7 @@
>   */
>  
>  #include <arm/intel/socfpga/socfpga_cyclone5.dtsi>
> +#include <dt-bindings/gpio/gpio.h>
>  
>  / {
>  	barebox,deep-probe;
> @@ -205,6 +206,12 @@ Reference:
>  	};
>  };
>  
> +&usbphy0 {
> +	/* HPS_GPIO0, active low */
> +	reset-gpios = <&porta 0 GPIO_ACTIVE_LOW>;
> +	status = "okay";
> +};
> +
>  &usb1 {
>  	status = "okay";
>  	dr_mode = "host";
> 

-- 
Pengutronix e.K.                  |                             |
Steuerwalder Str. 21              | http://www.pengutronix.de/  |
31137 Hildesheim, Germany         | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686  | Fax:   +49-5121-206917-5555 |

[PATCH v2 3/3] ARM: socfpga: xload: compress image with xz

[David Picard]

Compress the image of the first stage of Barebox with xz because it
features a good compression ratio.
Rationale: on some devices, the image has to fit in a ROM as small
as 64KiB.
---
 arch/arm/configs/socfpga-xload_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/socfpga-xload_defconfig b/arch/arm/configs/socfpga-xload_defconfig
index 22bab8d607..ec966c91a8 100644
--- a/arch/arm/configs/socfpga-xload_defconfig
+++ b/arch/arm/configs/socfpga-xload_defconfig
@@ -12,6 +12,7 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 # CONFIG_ARM_EXCEPTIONS is not set
 CONFIG_NAME="socfpga-xload_defconfig"
 # CONFIG_MEMINFO is not set
+CONFIG_IMAGE_COMPRESSION_XZKERN=y
 CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x0
 CONFIG_MALLOC_DUMMY=y

-- 
2.43.0

Re: [PATCH v2 3/3] ARM: socfpga: xload: compress image with xz

[Ahmad Fatoum]

On 3/5/26 10:55 AM, David Picard wrote:
> Compress the image of the first stage of Barebox with xz because it
> features a good compression ratio.
> Rationale: on some devices, the image has to fit in a ROM as small
> as 64KiB.

With Signed-off-by added:

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

> ---
>  arch/arm/configs/socfpga-xload_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/configs/socfpga-xload_defconfig b/arch/arm/configs/socfpga-xload_defconfig
> index 22bab8d607..ec966c91a8 100644
> --- a/arch/arm/configs/socfpga-xload_defconfig
> +++ b/arch/arm/configs/socfpga-xload_defconfig
> @@ -12,6 +12,7 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
>  # CONFIG_ARM_EXCEPTIONS is not set
>  CONFIG_NAME="socfpga-xload_defconfig"
>  # CONFIG_MEMINFO is not set
> +CONFIG_IMAGE_COMPRESSION_XZKERN=y
>  CONFIG_MMU=y
>  CONFIG_MALLOC_SIZE=0x0
>  CONFIG_MALLOC_DUMMY=y
> 

-- 
Pengutronix e.K.                  |                             |
Steuerwalder Str. 21              | http://www.pengutronix.de/  |
31137 Hildesheim, Germany         | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686  | Fax:   +49-5121-206917-5555 |