From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>
Subject: [PATCH 3/9] ARM: Rockchip: Simplify retrieval of SoC specific addresses
Date: Mon, 16 Mar 2026 18:21:16 +0100 [thread overview]
Message-ID: <20260316-compressed-firmware-v1-3-d9712142881e@pengutronix.de> (raw)
In-Reply-To: <20260316-compressed-firmware-v1-0-d9712142881e@pengutronix.de>
due to the nature of get_builtin_firmware() and the preprocessor
resolving of defines rockchip_atf_load_bl31 needs to be a macro. This is
not nice to look at and shouldn't be extended. Extending it is what we
want to do in the next step, so rework this into a macro which only
retrieves the addresses and from the actual code create a function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-rockchip/atf.c | 70 ++++++++++++++++++++++++++------------------
1 file changed, 42 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index a60b55ae24..8d7e505a99 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -108,34 +108,45 @@ static uintptr_t rk_load_optee(uintptr_t bl32, const void *bl32_image,
return bl32;
}
-#define rockchip_atf_load_bl31(SOC, atf_bin, tee_bin, fdt) do { \
- const void *bl31_elf, *optee; \
- unsigned long bl31; \
- size_t bl31_elf_size, optee_size; \
- uintptr_t optee_load_address = 0; \
- \
- get_builtin_firmware(atf_bin, &bl31_elf, &bl31_elf_size); \
- \
- bl31 = load_elf64_image_phdr(bl31_elf); \
- \
- if (IS_ENABLED(CONFIG_ARCH_ROCKCHIP_OPTEE)) { \
- get_builtin_firmware(tee_bin, &optee, &optee_size); \
- optee_load_address = rk_load_optee(SOC##_OPTEE_LOAD_ADDRESS, \
- optee, optee_size); \
- } \
- \
- /* Setup an initial stack for EL2 */ \
- asm volatile("msr sp_el2, %0" : : \
- "r" ((ulong)SOC##_BAREBOX_LOAD_ADDRESS - 16) : \
- "cc"); \
- \
- bl31_entry(bl31, optee_load_address, \
- SOC##_BAREBOX_LOAD_ADDRESS, (uintptr_t)fdt); \
-} while (0) \
+static uintptr_t barebox_load_address; /* where barebox is loaded and started */
+static uintptr_t optee_load_address; /* standard SoC specific OP-TEE load address */
+static const void *bl31; /* pointer to TF-A in barebox image */
+static size_t bl31_size; /* size of TF-A in barebox image */
+static const void *bl32; /* pointer to OP-TEE in barebox image */
+static size_t bl32_size; /* size of OP-TEE in barebox image */
+
+#define ROCKCHIP_GET_ADDRESSES(SOC, atf_bin, tee_bin) \
+ do { \
+ barebox_load_address = SOC##_BAREBOX_LOAD_ADDRESS; \
+ optee_load_address = SOC##_OPTEE_LOAD_ADDRESS; \
+ get_builtin_firmware(atf_bin, &bl31, &bl31_size); \
+ if (IS_ENABLED(CONFIG_ARCH_ROCKCHIP_OPTEE)) \
+ get_builtin_firmware(tee_bin, &bl32, &bl32_size); \
+ } while (0)
+
+
+static void rockchip_atf_load_bl31(void *fdt)
+{
+ unsigned long bl31_ep;
+
+ bl31_ep = load_elf64_image_phdr(bl31);
+
+ if (IS_ENABLED(CONFIG_ARCH_ROCKCHIP_OPTEE))
+ optee_load_address = rk_load_optee(optee_load_address, bl32, bl32_size);
+
+ /* Setup an initial stack for EL2 */
+ asm volatile("msr sp_el2, %0" : :
+ "r" ((ulong)barebox_load_address - 16) :
+ "cc");
+
+ bl31_entry(bl31_ep, optee_load_address,
+ barebox_load_address, (uintptr_t)fdt);
+}
void rk3562_atf_load_bl31(void *fdt)
{
- rockchip_atf_load_bl31(RK3562, rk3562_bl31_bin, rk3562_bl32_bin, fdt);
+ ROCKCHIP_GET_ADDRESSES(RK3562, rk3562_bl31_bin, rk3562_bl32_bin);
+ rockchip_atf_load_bl31(fdt);
}
void __noreturn rk3562_barebox_entry(void *fdt)
@@ -172,7 +183,8 @@ void __noreturn rk3562_barebox_entry(void *fdt)
void rk3568_atf_load_bl31(void *fdt)
{
- rockchip_atf_load_bl31(RK3568, rk3568_bl31_bin, rk3568_bl32_bin, fdt);
+ ROCKCHIP_GET_ADDRESSES(RK3568, rk3568_bl31_bin, rk3568_bl32_bin);
+ rockchip_atf_load_bl31(fdt);
}
void __noreturn rk3568_barebox_entry(void *fdt)
@@ -209,7 +221,8 @@ void __noreturn rk3568_barebox_entry(void *fdt)
void rk3588_atf_load_bl31(void *fdt)
{
- rockchip_atf_load_bl31(RK3588, rk3588_bl31_bin, rk3588_bl32_bin, fdt);
+ ROCKCHIP_GET_ADDRESSES(RK3588, rk3588_bl31_bin, rk3588_bl32_bin);
+ rockchip_atf_load_bl31(fdt);
}
static int rk3588_fixup_mem(void *fdt)
@@ -282,7 +295,8 @@ void __noreturn rk3588_barebox_entry(void *fdt)
void rk3576_atf_load_bl31(void *fdt)
{
- rockchip_atf_load_bl31(RK3576, rk3576_bl31_bin, rk3576_bl32_bin, fdt);
+ ROCKCHIP_GET_ADDRESSES(RK3576, rk3576_bl31_bin, rk3576_bl32_bin);
+ rockchip_atf_load_bl31(fdt);
}
void __noreturn rk3576_barebox_entry(void *fdt)
--
2.47.3
next prev parent reply other threads:[~2026-03-16 17:21 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 17:21 [PATCH 0/9] Firmware: support compressing firmware files Sascha Hauer
2026-03-16 17:21 ` [PATCH 1/9] ARM: socfpga: Drop unnecessary select USE_COMPRESSED_DTB Sascha Hauer
2026-03-16 17:21 ` [PATCH 2/9] ARM: radxa-rock5: Use compressed DTB Sascha Hauer
2026-03-16 17:21 ` Sascha Hauer [this message]
2026-03-16 17:21 ` [PATCH 4/9] firmware: Move firmware assembly generation to scripts/gen-fw-s Sascha Hauer
2026-03-16 17:21 ` [PATCH 5/9] firmware: Use struct fwobj for get_builtin_firmware APIs Sascha Hauer
2026-03-16 17:21 ` [PATCH 6/9] firmware: Add compressed firmware symbols for PBL Sascha Hauer
2026-03-19 14:19 ` [PATCH] fixup! " Sascha Hauer
2026-03-20 8:54 ` Sascha Hauer
2026-03-16 17:21 ` [PATCH 7/9] firmware: Add fwobj_uncompress() for decompressing firmware in PBL Sascha Hauer
2026-03-16 17:21 ` [PATCH 8/9] ARM: Rockchip: Use compressed OP-TEE binary Sascha Hauer
2026-03-18 8:10 ` Sascha Hauer
2026-03-16 17:21 ` [PATCH 9/9] ARM: Rockchip: Use compressed TF-A binary Sascha Hauer
2026-03-19 6:53 ` [PATCH 0/9] Firmware: support compressing firmware files Sascha Hauer
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