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Sat, 4 Jul 2026 14:26:30 +0200 From: Johannes Schneider To: barebox@lists.infradead.org Cc: Johannes Schneider Subject: [PATCH v2 00/11] i.MX8M: speed up the PBL boot path (MMU, SHA-256, eMMC) Date: Sat, 4 Jul 2026 12:26:17 +0000 Message-ID: <20260704122628.3326142-1-johannes.schneider@leica-geosystems.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-OriginalArrivalTime: 04 Jul 2026 12:26:30.0167 (UTC) FILETIME=[57881A70:01DD0BB0] X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB1PEPF000509EA:EE_|AM9PR06MB8145:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 65af7a8b-a08c-4191-90d8-08ded9c77a32 X-SET-LOWER-SCL-SCANNER: YES X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700016|23010399003|1800799024|82310400026|11063799006|56012099006|13003099007|18002099003; X-Microsoft-Antispam-Message-Info: zpQwKsnDSRQTEMaXLMr/E5eIEF2QzsUYhpML/NEGJiDhyOu9Dy5/wLI99dpIQGT87yufp0QeRoaNBktnxmD/YnR0hSLHbU6Xs0dNBcwGH6k8XpwyaQp4zR2Zw54OyIWld48A9EgGC8kTYmkVfGYre+1sF8FtfhRzB+7iAJ0I+t7AMiiK0JfKqEdhsyJfDr5dC0VroHc17OO2k+CCDVtbE814vT5li1DAM2uN7Wd3tlTld1WvAZKLxxL7PawZPxQxPAlXHc4FUeMoHTzMT2wKLGrc7OdCvWea3jUM+RROVIyc6Id1X2w3XX5Hc9ui/5jfRDpsaw17dvZevHxurhSUrlV5XV1pzkEBWWhEcTPWNIvejGpEQHOAYujlm1+kyiIK4MpP6E/hOZAOr+mVV6AV/YbujCVxLQ1wSGQYYBPHUq2LjL/RbWgxMvH14lxQU8M2nAKV+bHICQFUGlTWBJnpfgi/Q0GaH3p3oPk3gg3mzLfBeSLTXCaXvyjxuuxKFw/F2WYJUZo/hXp90aBHANpiL78kGt6rntgrbjlvWcl7LHPVmOLNiuxzYXoc7d/XviEkmV1jOqOp8XJ+yW0sw2izKPogBmv/QB2+wjAxYe7qTslT5+4521kuZNQxmXqjSk8AS2FAMB4l4q0MlLDBG18Ry11Qkqh3pVoE4rjWu340OZYF4rnp8FXgBx0ZxGl72iwWFM9VbPcNXKnwZiHdg6eKow== X-Forefront-Antispam-Report: CIP:193.8.40.99;CTRY:CH;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:hexagon.com;PTR:ahersrvdom51.leica-geosystems.com;CAT:NONE;SFS:(13230040)(376014)(36860700016)(23010399003)(1800799024)(82310400026)(11063799006)(56012099006)(13003099007)(18002099003);DIR:OUT;SFP:1101; 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Content preview: This merges two v1 threads that review showed depend on the same first step -- turning the MMU on in the PBL: - "crypto: sha256: PBL multi-block transform via ARMv8 Crypto Extensions" [1], where the ask was to keep the dispatch out of crypto/sha2.c [2]; and - "mci: imx-esdhc: speed up eMMC with ADMA2 + HS400 [...] Content analysis details: (-2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a01:111:f403:c200:0:0:0:3 listed in] [list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 DMARC_PASS DMARC pass policy X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-Rspamd-Server: mx1 X-Rspamd-Queue-Id: 9356A200286 X-Spamd-Result: default: False [-6.41 / 15.00]; BAYES_HAM(-3.00)[99.99%]; DWL_DNSWL_MED(-2.00)[infradead.org:dkim]; MID_CONTAINS_FROM(1.00)[]; ARC_ALLOW(-1.00)[microsoft.com:s=arcselector10001:i=1]; DMARC_POLICY_ALLOW(-0.50)[leica-geosystems.com,reject]; RCVD_DKIM_ARC_DNSWL_MED(-0.50)[]; R_MISSING_CHARSET(0.50)[]; R_SPF_ALLOW(-0.20)[+mx:c]; RCVD_IN_DNSWL_MED(-0.20)[2607:7c80:54:3::133:from]; R_DKIM_ALLOW(-0.20)[lists.infradead.org:s=bombadil.20210309,leica-geosystems.com:s=selector1]; MAILLIST(-0.20)[mailman]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; FROM_NEQ_ENVFROM(0.00)[johannes.schneider@leica-geosystems.com,barebox-bounces@lists.infradead.org]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[]; RCVD_IN_DNSWL_NONE(0.00)[2a01:111:f403:c200::3:received]; RECEIVED_HELO_LOCALHOST(0.00)[]; FORGED_RECIPIENTS_MAILLIST(0.00)[]; RCPT_COUNT_TWO(0.00)[2]; NEURAL_HAM(-0.00)[-1.000]; DKIM_TRACE(0.00)[lists.infradead.org:+,leica-geosystems.com:+]; ASN(0.00)[asn:7247, ipnet:2607:7c80:54::/48, country:US]; RCVD_COUNT_FIVE(0.00)[6]; RCVD_TLS_LAST(0.00)[]; TAGGED_FROM(0.00)[lore=pengutronix.de]; FROM_HAS_DN(0.00)[] X-Rspamd-Action: no action X-Stat-Signature: f5nchgpwuogf6am8t5bt4i9pktratgcp This merges two v1 threads that review showed depend on the same first step -- turning the MMU on in the PBL: - "crypto: sha256: PBL multi-block transform via ARMv8 Crypto Extensions" [1], where the ask was to keep the dispatch out of crypto/sha2.c [2]; and - "mci: imx-esdhc: speed up eMMC with ADMA2 + HS400 on i.MX8M" [3], where the ask was that PBL DMA needs the memory-synchronization (dma_map_*/dma_sync_*) the PBL lacks, and to concentrate on the MMU first since it is wanted anyway for a faster SHA-256 [4][5]. Ordered so it can be cut where it suits; each stage builds on the last: MMU 1 enable the MMU + D-cache around the fw-external BL32 verify, via a new imx8m_mmu_early_enable() that derives the early-DRAM size from the DDR bus width [6]. ~720 KiB verify: ~2 s -> ~300 ms. SHA-256 2 add the crypto-ext transform in a dedicated pbl/sha256.c, gated at runtime on ID_AA64ISAR0_EL1.SHA2 with a generic-C fallback. verify ~300 ms -> 3-5 ms. eMMC / PBL load 3-7 barebox-proper eMMC speedups: SDHCI error-bail + i.MX ADMA2 descriptor quirks, HS400/HS400ES, selectable transfer mode. 8 enable the MMU before the PBL eMMC load so PIO runs warm-cached (load_bl33 713 ms -> 241 ms on i.MX8MM). *** DMA-free cut point. *** 9-11 the PBL DMA path, now *with* the missing infrastructure: an opt-in CONFIG_PBL_HAS_DMA that gives the PBL real dma_map/dma_sync cache maintenance, SDHCI wired to it, and the i.MX8M PBL loader gaining SDMA/ADMA2 that select PBL_HAS_DMA and stay coherent with the D-cache on (load_bl33 241 ms -> 28 ms on i.MX8MM). v1's "dma: make dma_mapping_error() NULL-safe" already landed in next and is dropped. Based on next (261d2f8db0). Measured on i.MX8MM (GS05); both the PIO+MMU and ADMA2 paths boot correctly (the BL32 SHA-256 verify passing is the proof the PBL dma_sync is right). [1] https://lists.infradead.org/pipermail/barebox/2026-June/056744.html [2] https://lists.infradead.org/pipermail/barebox/2026-July/056890.html [3] https://lists.infradead.org/pipermail/barebox/2026-June/056837.html [4] https://lists.infradead.org/pipermail/barebox/2026-June/056842.html [5] https://lists.infradead.org/pipermail/barebox/2026-July/056891.html [6] https://lists.infradead.org/pipermail/barebox/2026-July/056889.html Johannes Schneider (11): ARM: i.MX8M: enable MMU in PBL around fw-external BL32 verify crypto: sha256: PBL SHA-256 fast path via pbl/sha256.c mci: sdhci: bail out on ADMA/transfer errors instead of hanging mci: sdhci: honor BROKEN_ADMA_ZEROLEN_DESC / NO_ENDATTR_IN_NOPDESC quirks mci: imx-esdhc: mark the uSDHC ADMA2 descriptor quirks mci: imx-esdhc: support HS400 and HS400ES on i.MX8M mci: imx-esdhc: make the transfer mode selectable (PIO/SDMA/ADMA2) ARM: i.MX8M: enable the MMU before the PBL eMMC load dma: provide the streaming DMA API in the PBL (opt-in via PBL_HAS_DMA) mci: sdhci: honour dma_map/dma_sync in the PBL mci: imx-esdhc: DMA in the i.MX8M PBL eMMC loader arch/arm/cpu/Makefile | 1 + arch/arm/crypto/Makefile | 3 ++ arch/arm/mach-imx/atf.c | 30 +++++++++++ common/Kconfig | 12 +++++ crypto/Kconfig | 12 +++++ drivers/dma/Makefile | 1 + drivers/mci/Kconfig | 46 ++++++++++++++-- drivers/mci/imx-esdhc-common.c | 33 +++++++++--- drivers/mci/imx-esdhc-pbl.c | 91 ++++++++++++++++++++++++++++--- drivers/mci/imx-esdhc.c | 98 ++++++++++++++++++++++++++++++++-- drivers/mci/imx-esdhc.h | 14 +++++ drivers/mci/sdhci.c | 51 +++++++++++++----- drivers/mci/sdhci.h | 4 ++ include/crypto/pbl-sha.h | 4 ++ include/dma.h | 7 +-- pbl/Makefile | 1 + pbl/decomp.c | 6 +-- pbl/sha256.c | 85 +++++++++++++++++++++++++++++ 18 files changed, 459 insertions(+), 40 deletions(-) create mode 100644 pbl/sha256.c -- 2.43.0