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Wed, 07 Oct 2026 12:55:48 +0200 From: Michael Tretter Date: Wed, 07 Oct 2026 12:55:53 +0200 Subject: [PATCH 08/11] arm: socfpga: agilex5: initialize QSPI flash in PBL MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261007-socfpga-agilex5-xload-v1-8-f8fb2d2819da@pengutronix.de> References: <20261007-socfpga-agilex5-xload-v1-0-f8fb2d2819da@pengutronix.de> In-Reply-To: <20261007-socfpga-agilex5-xload-v1-0-f8fb2d2819da@pengutronix.de> To: Sascha Hauer , BAREBOX Cc: Michael Tretter X-Mailer: b4 0.14.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261007_115559_432402_05886C8F X-CRM114-Status: GOOD ( 14.33 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "desiato.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Make the QSPI flash available in the PBL to be able to read a second stage boot loader from flash. Signed-off-by: Michael Tretter --- arch/arm/mach-socfpga/atf.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.0 DMARC_MISSING Missing DMARC policy X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-Spamd-Result: default: False [-61.01 / 15.00]; RECEIVED_AUTHENTICATED_BY_MX1(-50.00)[]; BAYES_HAM(-3.00)[100.00%]; DWL_DNSWL_MED(-2.00)[infradead.org:dkim]; ARC_ALLOW_TRUSTED(-2.00)[pengutronix.de:s=20260414:i=1]; ARC_ALLOW(-1.00)[pengutronix.de:s=20260414:i=1]; KNOWN_LIST_ID(-1.00)[barebox.lists.infradead.org]; RCVD_IN_DNSWL_MED(-0.80)[2a0a:edc0:0:c01:1d::a2:received,2607:7c80:54:3::133:from,2001:8b0:10b:1:d65d:64ff:fe57:4e05:received,2a0a:edc0:0:1101:1d::54:received]; RCVD_DKIM_ARC_DNSWL_MED(-0.50)[]; MAILLIST(-0.20)[mailman]; R_DKIM_ALLOW(-0.20)[lists.infradead.org:s=bombadil.20210309,pengutronix.de:s=20260414]; R_SPF_ALLOW(-0.20)[+mx:c]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; RCVD_TLS_LAST(0.00)[]; FORWARDED(0.00)[barebox@bombadil.infradead.org]; TO_DN_ALL(0.00)[]; DMARC_NA(0.00)[pengutronix.de]; FORGED_SENDER(0.00)[m.tretter@pengutronix.de,barebox-bounces@lists.infradead.org]; TAGGED_FROM(0.00)[lore=pengutronix.de]; MIME_TRACE(0.00)[0:+]; RECEIVED_HELO_LOCALHOST(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; DKIM_MIXED(0.00)[]; FORGED_SENDER_FORWARDING(0.00)[]; RCVD_COUNT_FIVE(0.00)[5]; FROM_NEQ_ENVFROM(0.00)[m.tretter@pengutronix.de,barebox-bounces@lists.infradead.org]; FROM_HAS_DN(0.00)[]; R_DKIM_REJECT(0.00)[infradead.org:s=desiato.20200630]; NEURAL_HAM(-0.00)[-1.000]; RCVD_VIA_SMTP_AUTH(0.00)[]; DKIM_TRACE(0.00)[lists.infradead.org:+,infradead.org:-,pengutronix.de:+]; MID_RHS_MATCH_FROM(0.00)[]; ARC_SIGNED(0.00)[pengutronix.de:s=20260414:i=2]; ASN(0.00)[asn:7247, ipnet:2607:7c80:54::/48, country:US]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Action: no action X-Rspamd-Server: mx1 X-Rspamd-Queue-Id: E402B201DCD X-Stat-Signature: 1ezcxt6gbg74feshkdtk69o8bpsnnbqy Make the QSPI flash available in the PBL to be able to read a second stage boot loader from flash. Signed-off-by: Michael Tretter --- arch/arm/mach-socfpga/atf.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-socfpga/atf.c b/arch/arm/mach-socfpga/atf.c index 6d036d20d4b6..a59a73d1c31f 100644 --- a/arch/arm/mach-socfpga/atf.c +++ b/arch/arm/mach-socfpga/atf.c @@ -13,29 +13,46 @@ #include #include +#include -static void socfpga_agilex5_qspi_init(void) +static struct pbl_bio *socfpga_agilex5_qspi_init(struct pbl_bio *bio) { + void __iomem *iobase = IOMEM(SOCFPGA_HPS2SDM_QSPI_REGS); + void __iomem *ahb_base = IOMEM(SOCFPGA_HPS2SDM_QSPI_DATA); + struct cadence_qspi_platform_data pdata = { + .is_decoded_cs = 0, + .fifo_depth = 128, + }; unsigned long master_ref_clk = 0; int ret; ret = socfpga_mailbox_s10_init(); if (ret) { pr_warn("Failed to init s10 mailbox: %d\n", ret); - return; + return PTR_ERR(-ENODEV); } ret = socfpga_mailbox_s10_qspi_open(&master_ref_clk); if (ret) { pr_warn("Failed to request QSPI access: %d\n", ret); - return; + return ERR_PTR(-ENODEV); } + /* + * Failing to store the reference clock may result in an unavailable + * QSPI flash later, but is not fatal. + */ ret = socfpga_agilex5_write_qspi_refclk(master_ref_clk); - if (ret) { + if (ret) pr_warn("Failed to store reference clock: %d\n", ret); - return; + + ret = cqspi_bio_init(bio, iobase, ahb_base, master_ref_clk, &pdata); + if (ret) { + pr_warn("failed to initialize bio for qspi\n"); + return ERR_PTR(-ENODEV); } + + return bio; } static int agilex5_load_bl33_piggy(void *bl33) @@ -92,6 +109,7 @@ static void __noreturn agilex5_start_image_via_tfa(void *bl33) static void agilex5_el3_init(void) { void *bl33 = (void *)AGILEX5_ATF_BL33_BASE_ADDR; + struct pbl_bio tmp, *bio; int ret; agilex5_initialize_security_policies(); @@ -101,9 +119,11 @@ static void agilex5_el3_init(void) if (ret) panic("DDR initialization failed\n"); - socfpga_agilex5_qspi_init(); + bio = socfpga_agilex5_qspi_init(&tmp); + if (IS_ERR_OR_NULL(bio)) + bio = NULL; - agilex5_load_bl33(NULL, bl33); + agilex5_load_bl33(bio, bl33); agilex5_start_image_via_tfa(bl33); } -- 2.47.3