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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The LiteX BIOS loads barebox into RAM and starts it in machine mode, so the image uses the machine mode head and the stage describes the RAM the old entry point passed to barebox_riscv_machine_entry() [...] Content analysis details: (0.0 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a0a:edc0:2:b01:1d:0:0:104 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 DMARC_MISSING Missing DMARC policy X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-Rspamd-Server: mx1 X-Rspamd-Queue-Id: 3CF56201CE0 X-Spamd-Result: default: False [-6.31 / 15.00]; BAYES_HAM(-3.00)[100.00%]; DWL_DNSWL_MED(-2.00)[infradead.org:dkim]; MID_CONTAINS_FROM(1.00)[]; KNOWN_LIST_ID(-1.00)[barebox.lists.infradead.org]; RCVD_IN_DNSWL_MED(-0.60)[2a0a:edc0:0:900:1d::77:received,2001:8b0:10b:1:d65d:64ff:fe57:4e05:received,2607:7c80:54:3::133:from]; RCVD_DKIM_ARC_DNSWL_MED(-0.50)[]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[lists.infradead.org:s=bombadil.20210309]; MAILLIST(-0.20)[mailman]; R_SPF_ALLOW(-0.20)[+mx:c]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; ASN(0.00)[asn:7247, ipnet:2607:7c80:54::/48, country:US]; FROM_HAS_DN(0.00)[]; DMARC_NA(0.00)[barebox.org]; ARC_NA(0.00)[]; FROM_NEQ_ENVFROM(0.00)[a.fatoum@barebox.org,barebox-bounces@lists.infradead.org]; FORWARDED(0.00)[barebox@bombadil.infradead.org]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; ARC_SIGNED(0.00)[pengutronix.de:s=20260414:i=1]; FORGED_SENDER(0.00)[a.fatoum@barebox.org,barebox-bounces@lists.infradead.org]; NEURAL_HAM(-0.00)[-1.000]; RECEIVED_HELO_LOCALHOST(0.00)[]; DKIM_MIXED(0.00)[]; FORGED_SENDER_FORWARDING(0.00)[]; DKIM_TRACE(0.00)[lists.infradead.org:+,infradead.org:-]; RCPT_COUNT_THREE(0.00)[4]; RCVD_COUNT_THREE(0.00)[4]; R_DKIM_REJECT(0.00)[infradead.org:s=desiato.20200630]; TAGGED_FROM(0.00)[lore=pengutronix.de]; RCVD_IN_DNSWL_NONE(0.00)[2a0a:edc0:2:b01:1d::104:received]; RCVD_TLS_LAST(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Action: no action X-Stat-Signature: gipaycxbacmg4drdwh4on9wzf9cxwpcg The LiteX BIOS loads barebox into RAM and starts it in machine mode, so the image uses the machine mode head and the stage describes the RAM the old entry point passed to barebox_riscv_machine_entry(). nmon goes into the CPU init callback, which runs before relocation like the old entry point did. The '>' now comes from the stage dispatch. Assisted-by: Claude:opus-5.5 Signed-off-by: Ahmad Fatoum --- arch/riscv/boards/litex-linux/lowlevel.c | 30 ++++++++++++++---------- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/arch/riscv/boards/litex-linux/lowlevel.c b/arch/riscv/boards/litex-linux/lowlevel.c index 6be3d62e64fb..2d7713cd48fc 100644 --- a/arch/riscv/boards/litex-linux/lowlevel.c +++ b/arch/riscv/boards/litex-linux/lowlevel.c @@ -1,22 +1,26 @@ // SPDX-License-Identifier: GPL-2.0-only #include +#include #include -#include #include -ENTRY_FUNCTION(start_litex_linux, a0, a1, a2) +#define LITEX_RAM_BASE 0x40000000 + +extern char __dtb_z_litex_linux_start[]; + +static void __prereloc litex_cpu_init(void) { - extern char __dtb_z_litex_linux_start[]; - void *fdt; - - /* BIOS will have loaded us into RAM */ - barebox_nmon_entry(); - - putc_ll('>'); - - fdt = __dtb_z_litex_linux_start + get_runtime_offset(); - - barebox_riscv_machine_entry(0x40000000, SZ_256M, fdt); } + +/* BIOS will have loaded us into RAM */ +ENTRY_POINT_HEAD(start_litex_linux, __barebox_pbl_head_v1_machine) + .soc_type = SOC_TYPE_LITEX, + .second_stage.stacktop = LITEX_RAM_BASE + SZ_256M, + .second_stage.mem_start = LITEX_RAM_BASE, + .second_stage.mem_minsz = SZ_256M, + .second_stage.board_data = __dtb_z_litex_linux_start, + .second_stage.prereloc_cpu_init = litex_cpu_init, + .second_stage.soc_chainload = pbl_stage_barebox_entry, +ENTRY_POINT_END -- 2.47.3