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Tue, 03 Nov 2026 14:16:54 +0100 (CET) From: Ahmad Fatoum To: barebox@lists.infradead.org Cc: lst@pengutronix.de, Ahmad Fatoum Subject: [PATCH 2/2] habv4: drop cache maintenance around HAB SiP calls Date: Tue, 3 Nov 2026 14:16:09 +0100 Message-ID: <20261103131652.663786-2-a.fatoum@pengutronix.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261103131652.663786-1-a.fatoum@pengutronix.de> References: <20261103131652.663786-1-a.fatoum@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261103_051702_951727_42094573 X-CRM114-Status: GOOD ( 16.35 ) X-Spam-Score: -2.1 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Ahmad Fatoum On i.MX8M, barebox runs in non-secure EL2 and queries the HAB status and, except on i.MX8MQ, the HAB events via SMC. So far, we cleaned and invalidated the caller's variables before the SMC and only i [...] Content analysis details: (-2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 DMARC_MISSING Missing DMARC policy X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-Rspamd-Server: mx1 X-Rspamd-Queue-Id: A30C7201CE0 X-Spamd-Result: default: False [-58.91 / 15.00]; RECEIVED_AUTHENTICATED_BY_MX1(-50.00)[]; BAYES_HAM(-3.00)[100.00%]; DWL_DNSWL_MED(-2.00)[infradead.org:dkim]; ARC_ALLOW_TRUSTED(-2.00)[pengutronix.de:s=20260414:i=1]; KNOWN_LIST_ID(-1.00)[barebox.lists.infradead.org]; MID_CONTAINS_FROM(1.00)[]; ARC_ALLOW(-1.00)[pengutronix.de:s=20260414:i=1]; RCVD_DKIM_ARC_DNSWL_MED(-0.50)[]; R_MISSING_CHARSET(0.50)[]; RCVD_IN_DNSWL_MED(-0.20)[2607:7c80:54:3::133:from]; R_SPF_ALLOW(-0.20)[+mx:c]; MAILLIST(-0.20)[mailman]; R_DKIM_ALLOW(-0.20)[lists.infradead.org:s=bombadil.20210309,pengutronix.de:s=20260414]; MIME_GOOD(-0.10)[text/plain]; HAS_LIST_UNSUB(-0.01)[]; RECEIVED_HELO_LOCALHOST(0.00)[]; RCVD_COUNT_THREE(0.00)[4]; DMARC_NA(0.00)[pengutronix.de]; ARC_SIGNED(0.00)[pengutronix.de:s=20260414:i=2]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; DKIM_TRACE(0.00)[lists.infradead.org:+,pengutronix.de:+]; TAGGED_FROM(0.00)[lore=pengutronix.de]; FROM_NEQ_ENVFROM(0.00)[a.fatoum@pengutronix.de,barebox-bounces@lists.infradead.org]; FROM_HAS_DN(0.00)[]; RCVD_TLS_LAST(0.00)[]; NEURAL_HAM(-0.00)[-1.000]; ASN(0.00)[asn:7247, ipnet:2607:7c80:54::/48, country:US]; RCVD_VIA_SMTP_AUTH(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Action: no action X-Stat-Signature: ac54976b8hkrwquwmsobqm5am5kypmai From: Ahmad Fatoum On i.MX8M, barebox runs in non-secure EL2 and queries the HAB status and, except on i.MX8MQ, the HAB events via SMC. So far, we cleaned and invalidated the caller's variables before the SMC and only invalidated them afterwards. TF-A doesn't do any cache maintenance itself on the buffers and the BootROM doesn't do any either: The BootROM disables the MMU it had setup and cleans and invalidates the D-cache before jumping to the boot image. The results are thus written through TF-A's mapping of DRAM (SCTLR_EL3.{M,C} = 1, MT_MEMORY | MT_RW | MT_NS), i.e. Normal Write-Back, Inner Shareable, Non-secure, and may still be dirty in the cache when the SMC returns. Now that barebox maps normal memory the same way, no maintenance is needed at all and no alignment requirements exist for buffers. Dropping the cache maintenance also fixes a bug: The invalidate after the SMC was wrong, as it may discard updates not yet cleaned from the cache, such as unrelated stack data in the same lines. This was not observed to cause issues thus far, presumably because the Cortex-A53 on the i.MX8M cleans dirty lines on DC IVAC when invalidating them[1]. So let's drop the maintenance. With the MMU disabled, our accesses would be Device-nGnRnE and need it again, so make HABV4 depend on MMU for ARMv8 systems instead. [1]: Arm DDI 0500J, Cortex-A53 TRM, 6.2.4 Data cache maintenance considerations, 6-3 Fixes: 6c4d5bb5acfe ("i.MX: HABv4: implement interface for i.MX8MQ") Fixes: 3177ed294444 ("habv4: use hab rom implementation of report_event") Assisted-by: Claude:opus-5.5 Signed-off-by: Ahmad Fatoum --- While a fix, I am not in a hurry to get this merged. next is fine to get some more testing. --- arch/arm/mach-imx/Kconfig | 2 +- drivers/hab/habv4.c | 33 ++------------------------------- 2 files changed, 3 insertions(+), 32 deletions(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 5a5931f1a33d..0910eaa439c8 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -907,7 +907,7 @@ config HABV4 select HAB select NVMEM select IMX_OCOTP - depends on ARCH_IMX6 || ARCH_IMX8M + depends on ARCH_IMX6 || (ARCH_IMX8M && MMU) help High Assurance Boot, as found on i.MX28/i.MX6/i.MX8M. diff --git a/drivers/hab/habv4.c b/drivers/hab/habv4.c index 83ee06a6aa46..e6244c96556e 100644 --- a/drivers/hab/habv4.c +++ b/drivers/hab/habv4.c @@ -7,16 +7,13 @@ #define pr_fmt(fmt) "HABv4: " fmt -#include #include #include #include #include -#include #include #include #include -#include #include #include @@ -196,24 +193,10 @@ static enum hab_status hab_sip_report_event(enum hab_status status, { struct arm_smccc_res res; - v8_flush_dcache_range((unsigned long)bytes, - (unsigned long)bytes + sizeof(*bytes)); - - if (event) - v8_flush_dcache_range((unsigned long)event, - (unsigned long)event + *bytes); - arm_smccc_smc(FSL_SIP_HAB, FSL_SIP_HAB_REPORT_EVENT, (unsigned long)index, (unsigned long)event, (unsigned long)bytes, 0, 0, 0, &res); - v8_inv_dcache_range((unsigned long)bytes, - (unsigned long)bytes + sizeof(*bytes)); - - if (event) - v8_inv_dcache_range((unsigned long)event, - (unsigned long)event + *bytes); - return (enum hab_status)res.a0; } @@ -222,22 +205,10 @@ static enum hab_status hab_sip_report_status(enum hab_config *config, { struct arm_smccc_res res; - if (state) - v8_flush_dcache_range((unsigned long)state, - (unsigned long)state + sizeof(*config)); - if (config) - v8_flush_dcache_range((unsigned long)config, - (unsigned long)config + sizeof(*state)); - arm_smccc_smc(FSL_SIP_HAB, FSL_SIP_HAB_REPORT_STATUS, (unsigned long) config, (unsigned long) state, 0, 0, 0, 0, &res); - if (state) - v8_inv_dcache_range((unsigned long)state, - (unsigned long)state + sizeof(*config)); - if (config) - v8_inv_dcache_range((unsigned long)config, - (unsigned long)config + sizeof(*state)); + return (enum hab_status)res.a0; } @@ -587,7 +558,7 @@ static uint8_t *hab_get_event(const struct habv4_rvt *rvt, int index, size_t *le if (err != HAB_STATUS_SUCCESS) return NULL; - buf = dma_alloc(*len); + buf = malloc(*len); if (!buf) return NULL; -- 2.47.3