Re: [PATCH v2 20/21] riscv: Allwinner D1: Drop M-Mode

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

On 1/6/26 1:53 PM, Sascha Hauer wrote:
> The Allwinner D1 selects both RISCV_M_MODE and RISCV_S_MODE. The board
> code uses barebox_riscv_machine_entry() and not barebox_riscv_machine_entry()
> which indicates RISCV_M_MODE was only selected by accident. Remove it.
> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

> ---
>  arch/riscv/Kconfig.socs | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 4a3b56b5fff48c86901ed0346be490a6847ac14e..0d9984dd2888e6cab81939e3ee97ef83851362a0 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -123,7 +123,6 @@ if SOC_ALLWINNER_SUN20I
>  config BOARD_ALLWINNER_D1
>  	bool "Allwinner D1 Nezha"
>  	select RISCV_S_MODE
> -	select RISCV_M_MODE
>  	def_bool y
>  
>  endif
> 

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